85xx: Add QE clk support

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <Timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 1c3eddfd37d8af1418ed49e2c240aceab538d3b0..8f94bada04162d35105c99356be31113ba61211a 100644 (file)
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -186,6 +186,10 @@ int checkcpu (void)
        printf("CPM:   %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
 #endif
 
+#ifdef CONFIG_QE
+       printf("       QE:%-4s MHz\n", strmhz(buf1, sysinfo.freqQE));
+#endif
+
        puts("L1:    D-cache 32 kB enabled\n       I-cache 32 kB enabled\n");
 
        return 0;

diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index b0f47e042e96455120d38e397f8f20c6d0397648..286b6b28ef24a3fda234caa9a6253953a37eeebe 100644 (file)
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007-2009 Freescale Semiconductor Inc.
  * (C) Copyright 2003 Motorola Inc.
  * Xianghua Xiao, (X.Xiao@motorola.com)
  *
@@ -40,6 +40,9 @@ void get_sys_info (sys_info_t * sysInfo)
        uint plat_ratio,e500_ratio,half_freqSystemBus;
        uint lcrr_div;
        int i;
+#ifdef CONFIG_QE
+       u32 qe_ratio;
+#endif
 
        plat_ratio = (gur->porpllsr) & 0x0000003e;
        plat_ratio >>= 1;
@@ -65,6 +68,12 @@ void get_sys_info (sys_info_t * sysInfo)
        }
 #endif
 
+#ifdef CONFIG_QE
+       qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO)
+                       >> MPC85xx_PORPLLSR_QE_RATIO_SHIFT;
+       sysInfo->freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ;
+#endif
+
 #if defined(CONFIG_SYS_LBC_LCRR)
        /* We will program LCRR to this value later */
        lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV;
@@ -112,6 +121,10 @@ int get_clocks (void)
        gd->mem_clk = sys_info.freqDDRBus;
        gd->lbc_clk = sys_info.freqLocalBus;
 
+#ifdef CONFIG_QE
+       gd->qe_clk = sys_info.freqQE;
+       gd->brg_clk = gd->qe_clk / 2;
+#endif
        /*
         * The base clock for I2C depends on the actual SOC.  Unfortunately,
         * there is no pattern that can be used to determine the frequency, so

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 06b4dc31f47807782faabeaeea72bc5f45e7731c..0f9f493d1f39a09b17b4bc536e0086defef6515b 100644 (file)
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1596,6 +1596,8 @@ typedef struct ccsr_gur {
 #define MPC85xx_PORPLLSR_DDR_RATIO     0x00003e00
 #define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT       9
 #endif
+#define MPC85xx_PORPLLSR_QE_RATIO      0x3e000000
+#define MPC85xx_PORPLLSR_QE_RATIO_SHIFT                25
        uint    porbmsr;        /* 0xe0004 - POR boot mode status register */
 #define MPC85xx_PORBMSR_HA             0x00070000
        uint    porimpscr;      /* 0xe0008 - POR I/O impedance status and control register */

diff --git a/include/e500.h b/include/e500.h
index 4c5eeb74e1485119bf4c99d7d5da4fbc04e724fc..84b580de1f4cc09feb5cd8aef7592e2f3deca23e 100644 (file)
--- a/include/e500.h
+++ b/include/e500.h
@@ -18,6 +18,7 @@ typedef struct
   unsigned long freqSystemBus;
   unsigned long freqDDRBus;
   unsigned long freqLocalBus;
+  unsigned long freqQE;
 } MPC85xx_SYS_INFO;
 
 #endif  /* _ASMLANGUAGE */