]> git.sur5r.net Git - u-boot/commitdiff
sf: drop unused/duplicate command defines
authorMike Frysinger <vapier@gentoo.org>
Sun, 29 Jan 2012 00:26:03 +0000 (16:26 -0800)
committerMike Frysinger <vapier@gentoo.org>
Fri, 20 Jul 2012 04:41:36 +0000 (00:41 -0400)
In an effort to unify the spi flash drivers further, drop all the
unused and/or duplicate command defines.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
drivers/mtd/spi/eon.c
drivers/mtd/spi/macronix.c
drivers/mtd/spi/ramtron.c
drivers/mtd/spi/spansion.c
drivers/mtd/spi/spi_flash_internal.h
drivers/mtd/spi/sst.c
drivers/mtd/spi/stmicro.c
drivers/mtd/spi/winbond.c

index f9352f95a6c67363daae45c80c7189fcc2773a75..6a3bf0f3221365e80041a18ad1f84c2d93a5c410 100644 (file)
 #include "spi_flash_internal.h"
 
 /* EN25Q128-specific commands */
-#define CMD_EN25Q128_WREN      0x06    /* Write Enable */
-#define CMD_EN25Q128_WRDI      0x04    /* Write Disable */
-#define CMD_EN25Q128_RDSR      0x05    /* Read Status Register */
-#define CMD_EN25Q128_WRSR      0x01    /* Write Status Register */
-#define CMD_EN25Q128_READ      0x03    /* Read Data Bytes */
-#define CMD_EN25Q128_FAST_READ 0x0b    /* Read Data Bytes at Higher Speed */
-#define CMD_EN25Q128_PP                0x02    /* Page Program */
 #define CMD_EN25Q128_SE                0x20    /* Sector Erase */
 #define CMD_EN25Q128_BE                0xd8    /* Block Erase */
-#define CMD_EN25Q128_DP                0xb9    /* Deep Power-down */
-#define CMD_EN25Q128_RES       0xab    /* Release from DP, and Read Signature */
 
 struct eon_spi_flash_params {
        u8 idcode1;
index dacbc28b3e5e2d5bb86bdb84314aeb1388df0bd9..87a3ad0c30259eec6bebb34780d984cde4b6214a 100644 (file)
 #include "spi_flash_internal.h"
 
 /* MX25xx-specific commands */
-#define CMD_MX25XX_WREN                0x06    /* Write Enable */
-#define CMD_MX25XX_WRDI                0x04    /* Write Disable */
-#define CMD_MX25XX_RDSR                0x05    /* Read Status Register */
-#define CMD_MX25XX_WRSR                0x01    /* Write Status Register */
-#define CMD_MX25XX_READ                0x03    /* Read Data Bytes */
-#define CMD_MX25XX_FAST_READ   0x0b    /* Read Data Bytes at Higher Speed */
-#define CMD_MX25XX_PP          0x02    /* Page Program */
 #define CMD_MX25XX_SE          0x20    /* Sector Erase */
 #define CMD_MX25XX_BE          0xD8    /* Block Erase */
 #define CMD_MX25XX_CE          0xc7    /* Chip Erase */
-#define CMD_MX25XX_DP          0xb9    /* Deep Power-down */
-#define CMD_MX25XX_RES         0xab    /* Release from DP, and Read Signature */
 
 struct macronix_spi_flash_params {
        u16 idcode;
@@ -128,7 +119,7 @@ static int macronix_write_status(struct spi_flash *flash, u8 sr)
                return ret;
        }
 
-       cmd = CMD_MX25XX_WRSR;
+       cmd = CMD_WRITE_STATUS;
        ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
        if (ret) {
                debug("SF: fail to write status register\n");
index 27d4039aadef64a0f0a2ab2f06774fe30a6caefc..099978149696968452e2851530687f6b358d2c4f 100644 (file)
 #include <spi_flash.h>
 #include "spi_flash_internal.h"
 
-/* RAMTRON commands common to all devices */
-#define CMD_RAMTRON_WREN       0x06    /* Write Enable */
-#define CMD_RAMTRON_WRDI       0x04    /* Write Disable */
-#define CMD_RAMTRON_RDSR       0x05    /* Read Status Register */
-#define CMD_RAMTRON_WRSR       0x01    /* Write Status Register */
-#define CMD_RAMTRON_READ       0x03    /* Read Data Bytes */
-#define CMD_RAMTRON_WRITE      0x02    /* Write Data Bytes */
-/* not all have those: */
-#define CMD_RAMTRON_FSTRD      0x0b    /* Fast Read (for compatibility - not used here) */
-#define CMD_RAMTRON_SLEEP      0xb9    /* Enter Sleep Mode */
-#define CMD_RAMTRON_RDID       0x9f    /* Read ID */
-#define CMD_RAMTRON_SNR                0xc3    /* Read Serial Number */
-
 /*
  * Properties of supported FRAMs
  * Note: speed is currently not used because we have no method to deliver that
@@ -196,7 +183,7 @@ static int ramtron_common(struct spi_flash *flash,
                return ret;
        }
 
-       if (command == CMD_RAMTRON_WRITE) {
+       if (command == CMD_PAGE_PROGRAM) {
                /* send WREN */
                ret = spi_flash_cmd_write_enable(flash);
                if (ret < 0) {
@@ -206,7 +193,7 @@ static int ramtron_common(struct spi_flash *flash,
        }
 
        /* do the transaction */
-       if (command == CMD_RAMTRON_WRITE)
+       if (command == CMD_PAGE_PROGRAM)
                ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, buf, len);
        else
                ret = spi_flash_cmd_read(flash->spi, cmd, cmd_len, buf, len);
@@ -223,14 +210,14 @@ static int ramtron_read(struct spi_flash *flash,
                u32 offset, size_t len, void *buf)
 {
        return ramtron_common(flash, offset, len, buf,
-               CMD_RAMTRON_READ);
+               CMD_READ_ARRAY_SLOW);
 }
 
 static int ramtron_write(struct spi_flash *flash,
                u32 offset, size_t len, const void *buf)
 {
        return ramtron_common(flash, offset, len, (void *)buf,
-               CMD_RAMTRON_WRITE);
+               CMD_PAGE_PROGRAM);
 }
 
 static int ramtron_erase(struct spi_flash *flash, u32 offset, size_t len)
@@ -270,7 +257,7 @@ struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode)
                 * We COULD have a non JEDEC conformant FRAM here,
                 * read the status register to verify
                 */
-               ret = spi_flash_cmd(spi, CMD_RAMTRON_RDSR, &sr, 1);
+               ret = spi_flash_cmd(spi, CMD_READ_STATUS, &sr, 1);
                if (ret)
                        return NULL;
 
index 6301d871237d0b6c1d139cb086bb04b5a9282c15..b99bd13e7e493a8e94fb381828041915b41a770e 100644 (file)
 #include "spi_flash_internal.h"
 
 /* S25FLxx-specific commands */
-#define CMD_S25FLXX_READ       0x03    /* Read Data Bytes */
-#define CMD_S25FLXX_FAST_READ  0x0b    /* Read Data Bytes at Higher Speed */
-#define CMD_S25FLXX_READID     0x90    /* Read Manufacture ID and Device ID */
-#define CMD_S25FLXX_WREN       0x06    /* Write Enable */
-#define CMD_S25FLXX_WRDI       0x04    /* Write Disable */
-#define CMD_S25FLXX_RDSR       0x05    /* Read Status Register */
-#define CMD_S25FLXX_WRSR       0x01    /* Write Status Register */
-#define CMD_S25FLXX_PP         0x02    /* Page Program */
 #define CMD_S25FLXX_SE         0xd8    /* Sector Erase */
 #define CMD_S25FLXX_BE         0xc7    /* Bulk Erase */
-#define CMD_S25FLXX_DP         0xb9    /* Deep Power-down */
-#define CMD_S25FLXX_RES                0xab    /* Release from DP, and Read Signature */
 
 #define SPSN_ID_S25FL008A      0x0213
 #define SPSN_ID_S25FL016A      0x0214
index 91e036a4e7cb54abb608613ad7c8475f07e8033c..0c78249791e81f98a19130231473163e8ce12080 100644 (file)
@@ -17,8 +17,8 @@
 
 #define CMD_READ_ARRAY_SLOW            0x03
 #define CMD_READ_ARRAY_FAST            0x0b
-#define CMD_READ_ARRAY_LEGACY          0xe8
 
+#define CMD_WRITE_STATUS               0x01
 #define CMD_PAGE_PROGRAM               0x02
 #define CMD_WRITE_DISABLE              0x04
 #define CMD_READ_STATUS                        0x05
index 9559c80072e69e34f2f90ad6183a51c29a6e167e..e51dfc7f29fbd15ef0ebbc3b0d8f4b64e28928d1 100644 (file)
 
 #include "spi_flash_internal.h"
 
-#define CMD_SST_WREN           0x06    /* Write Enable */
-#define CMD_SST_WRDI           0x04    /* Write Disable */
-#define CMD_SST_RDSR           0x05    /* Read Status Register */
-#define CMD_SST_WRSR           0x01    /* Write Status Register */
-#define CMD_SST_READ           0x03    /* Read Data Bytes */
-#define CMD_SST_FAST_READ      0x0b    /* Read Data Bytes at Higher Speed */
 #define CMD_SST_BP             0x02    /* Byte Program */
 #define CMD_SST_AAI_WP         0xAD    /* Auto Address Increment Word Program */
 #define CMD_SST_SE             0x20    /* Sector Erase */
@@ -137,7 +131,7 @@ sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
        };
 
        debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
-               spi_w8r8(flash->spi, CMD_SST_RDSR), buf, cmd[0], offset);
+               spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
 
        ret = sst_enable_writing(flash);
        if (ret)
@@ -184,7 +178,7 @@ sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, const void *buf)
 
        for (; actual < len - 1; actual += 2) {
                debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
-                    spi_w8r8(flash->spi, CMD_SST_RDSR), buf + actual, cmd[0],
+                    spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual, cmd[0],
                     offset);
 
                ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
@@ -232,13 +226,13 @@ sst_unlock(struct spi_flash *flash)
        if (ret)
                return ret;
 
-       cmd = CMD_SST_WRSR;
+       cmd = CMD_WRITE_STATUS;
        status = 0;
        ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &status, 1);
        if (ret)
                debug("SF: Unable to set status byte\n");
 
-       debug("SF: sst: status = %x\n", spi_w8r8(flash->spi, CMD_SST_RDSR));
+       debug("SF: sst: status = %x\n", spi_w8r8(flash->spi, CMD_READ_STATUS));
 
        return ret;
 }
index a9b33cfd9426f3a6cd71914db66b4d0ec54269c3..5b684792deca53e7ccc5a2980a382e3395e6a5d6 100644 (file)
 #include "spi_flash_internal.h"
 
 /* M25Pxx-specific commands */
-#define CMD_M25PXX_WREN                0x06    /* Write Enable */
-#define CMD_M25PXX_WRDI                0x04    /* Write Disable */
-#define CMD_M25PXX_RDSR                0x05    /* Read Status Register */
-#define CMD_M25PXX_WRSR                0x01    /* Write Status Register */
-#define CMD_M25PXX_READ                0x03    /* Read Data Bytes */
-#define CMD_M25PXX_FAST_READ   0x0b    /* Read Data Bytes at Higher Speed */
-#define CMD_M25PXX_PP          0x02    /* Page Program */
 #define CMD_M25PXX_SE          0xd8    /* Sector Erase */
 #define CMD_M25PXX_BE          0xc7    /* Bulk Erase */
-#define CMD_M25PXX_DP          0xb9    /* Deep Power-down */
 #define CMD_M25PXX_RES         0xab    /* Release from DP, and Read Signature */
 
 struct stmicro_spi_flash_params {
index c20faa26fcc52e798e3bb442d166ba1a3992f78a..0e126f40c5e55ac9e39498c0eab585583f850e5b 100644 (file)
 #include "spi_flash_internal.h"
 
 /* M25Pxx-specific commands */
-#define CMD_W25_WREN           0x06    /* Write Enable */
-#define CMD_W25_WRDI           0x04    /* Write Disable */
-#define CMD_W25_RDSR           0x05    /* Read Status Register */
-#define CMD_W25_WRSR           0x01    /* Write Status Register */
-#define CMD_W25_READ           0x03    /* Read Data Bytes */
-#define CMD_W25_FAST_READ      0x0b    /* Read Data Bytes at Higher Speed */
-#define CMD_W25_PP             0x02    /* Page Program */
 #define CMD_W25_SE             0x20    /* Sector (4K) Erase */
 #define CMD_W25_BE             0xd8    /* Block (64K) Erase */
 #define CMD_W25_CE             0xc7    /* Chip Erase */
-#define CMD_W25_DP             0xb9    /* Deep Power-down */
-#define CMD_W25_RES            0xab    /* Release from DP, and Read Signature */
 
 struct winbond_spi_flash_params {
        uint16_t        id;