mpc8569mds: fix some ddr settings

Enable half drive strength, set RTT to 60Ohm and set write leveling override.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/freescale/mpc8569mds/ddr.c b/board/freescale/mpc8569mds/ddr.c
index e938788f0739645564bea9e4ca95684269c3e44d..e3f5b4aa21dae5ee9d2e6439d41b2f867af9eceb 100644 (file)
--- a/board/freescale/mpc8569mds/ddr.c
+++ b/board/freescale/mpc8569mds/ddr.c
@@ -77,8 +77,18 @@ void fsl_ddr_board_options(memctl_options_t *popts,
        popts->write_data_delay = 2;
 
        /*
-        * Factors to consider for half-strength driver enable:
-        *      - number of DIMMs installed
+        * Enable half drive strength
         */
-       popts->half_strength_driver_enable = 0;
+       popts->half_strength_driver_enable = 1;
+
+       /* Write leveling override */
+       popts->wrlvl_en = 1;
+       popts->wrlvl_override = 1;
+       popts->wrlvl_sample = 0xa;
+       popts->wrlvl_start = 0x4;
+
+       /* Rtt and Rtt_W override */
+       popts->rtt_override = 1;
+       popts->rtt_override_value = DDR3_RTT_60_OHM;
+       popts->rtt_wr_override_value = 0; /* Rtt_WR= dynamic ODT off */
 }