]> git.sur5r.net Git - u-boot/commitdiff
rockchip: rk3128: add sdram driver
authorKever Yang <kever.yang@rock-chips.com>
Tue, 28 Nov 2017 08:04:21 +0000 (16:04 +0800)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Thu, 30 Nov 2017 21:55:27 +0000 (22:55 +0100)
RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width.

This patch is only used for U-Boot, but not for SPL which will
comes later, maybe after we merge all the common code into a common
file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
drivers/ram/rockchip/Makefile
drivers/ram/rockchip/sdram_rk3128.c [new file with mode: 0644]

index 45b5fe724719ce74346b4dc7d15530add992f637..1a1e5578ca4b6143c21cf82c6bbd84b7e388c76c 100644 (file)
@@ -5,6 +5,7 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c
new file mode 100644 (file)
index 0000000..a33127f
--- /dev/null
@@ -0,0 +1,59 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3128.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct dram_info {
+       struct ram_info info;
+       struct rk3128_grf *grf;
+};
+
+static int rk3128_dmc_probe(struct udevice *dev)
+{
+       struct dram_info *priv = dev_get_priv(dev);
+
+       priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+       debug("%s: grf=%p\n", __func__, priv->grf);
+       priv->info.base = CONFIG_SYS_SDRAM_BASE;
+       priv->info.size = rockchip_sdram_size(
+                               (phys_addr_t)&priv->grf->os_reg[1]);
+
+       return 0;
+}
+
+static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+       struct dram_info *priv = dev_get_priv(dev);
+
+       *info = priv->info;
+
+       return 0;
+}
+
+static struct ram_ops rk3128_dmc_ops = {
+       .get_info = rk3128_dmc_get_info,
+};
+
+static const struct udevice_id rk3128_dmc_ids[] = {
+       { .compatible = "rockchip,rk3128-dmc" },
+       { }
+};
+
+U_BOOT_DRIVER(dmc_rk3128) = {
+       .name = "rockchip_rk3128_dmc",
+       .id = UCLASS_RAM,
+       .of_match = rk3128_dmc_ids,
+       .ops = &rk3128_dmc_ops,
+       .probe = rk3128_dmc_probe,
+       .priv_auto_alloc_size = sizeof(struct dram_info),
+};