]> git.sur5r.net Git - u-boot/commitdiff
snowball: applying power to LAN and GBF controllers
authorMathieu J. Poirier <mathieu.poirier@linaro.org>
Tue, 31 Jul 2012 08:59:28 +0000 (08:59 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 1 Sep 2012 12:58:20 +0000 (14:58 +0200)
LAN and GBF need to be powered explicitely, doing so with
interface to AB8500 companion chip.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
arch/arm/include/asm/arch-u8500/hardware.h
arch/arm/include/asm/arch-u8500/prcmu.h
board/st-ericsson/snowball/snowball.c
include/configs/snowball.h

index 920888052b91ac2b9c9e4927dab2d919b3d21a3b..8044ac3af4e9233581477be5d6ddb433f884325f 100644 (file)
@@ -62,7 +62,7 @@
 
 /* Per4 */
 #define U8500_PRCMU_BASE       (U8500_PER4_BASE + 0x07000)
-#define U8500_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x06800)
+#define U8500_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x68000)
 
 /* Per3 */
 #define U8500_UART2_BASE       (U8500_PER3_BASE + 0x7000)
 #define U8500_BOOTROM_BASE      0x9001f000
 #define U8500_BOOTROM_ASIC_ID_OFFSET    0x0ff4
 
+/* AB8500 specifics */
+#define AB8500_MISC            0x0010
+#define AB8500_GPIO_SEL2_REG   0x1001
+#define AB8500_GPIO_DIR2_REG   0x1011
+#define AB8500_GPIO_DIR4_REG   0x1013
+#define AB8500_GPIO_SEL4_REG   0x1003
+#define AB8500_GPIO_OUT2_REG   0x1021
+#define AB8500_GPIO_OUT4_REG   0x1023
+
 #endif /* __ASM_ARCH_HARDWARE_H */
index 9862eb3dd952ecb2d7ca2d801c7fe74820e27b2c..e9dcc9325cd0ddcbb15948c8db0afd07134bce72 100644 (file)
 
 #define REQ_MB5                        5
 
-extern int prcmu_i2c_read(u8 reg, u16 slave);
-extern int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data);
+#define ab8500_read    prcmu_i2c_read
+#define ab8500_write   prcmu_i2c_write
+
+int prcmu_i2c_read(u8 reg, u16 slave);
+int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data);
 
 void u8500_prcmu_enable(u32 *reg);
 void db8500_prcmu_init(void);
index 4bcc649724b65ae22a36f8031353aed0f6fb8186..7c3e08ce3f5602e7b3d3fc58e804030002fea9f4 100644 (file)
@@ -25,6 +25,8 @@
 #include <asm/io.h>
 #include <asm/errno.h>
 #include <asm/arch/db8500_pincfg.h>
+#include <asm/arch/prcmu.h>
+#include <asm/arch/hardware.h>
 
 #include "db8500_pins.h"
 
@@ -164,3 +166,88 @@ int dram_init(void)
 
        return 0;
 }
+
+static int raise_ab8500_gpio16(void)
+{
+       int ret;
+
+       /* selection */
+       ret = ab8500_read(AB8500_MISC, AB8500_GPIO_SEL2_REG);
+       if (ret < 0)
+               goto out;
+
+       ret |= 0x80;
+       ret = ab8500_write(AB8500_MISC, AB8500_GPIO_SEL2_REG, ret);
+       if (ret < 0)
+               goto out;
+
+       /* direction */
+       ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR2_REG);
+       if (ret < 0)
+               goto out;
+
+       ret |= 0x80;
+       ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR2_REG, ret);
+       if (ret < 0)
+               goto out;
+
+       /* out */
+       ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT2_REG);
+       if (ret < 0)
+               goto out;
+
+       ret |= 0x80;
+       ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT2_REG, ret);
+
+out:
+       return ret;
+}
+
+static int raise_ab8500_gpio26(void)
+{
+       int ret;
+
+       /* selection */
+       ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR4_REG);
+       if (ret < 0)
+               goto out;
+
+       ret |= 0x2;
+       ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR4_REG, ret);
+       if (ret < 0)
+               goto out;
+
+       /* out */
+       ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT4_REG);
+       if (ret < 0)
+               goto out;
+
+       ret |= 0x2;
+       ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT4_REG, ret);
+
+out:
+       return ret;
+}
+
+int board_late_init(void)
+{
+       /* enable 3V3 for LAN controller */
+       if (raise_ab8500_gpio26() >= 0) {
+               /* Turn on FSMC device */
+               writel(0x1, 0x8000f000);
+               writel(0x1, 0x8000f008);
+
+               /* setup FSMC for LAN controler */
+               writel(0x305b, 0x80000000);
+
+               /* run at the highest possible speed */
+               writel(0x01010210, 0x80000004);
+       } else
+               printf("error: can't raise GPIO26\n");
+
+       /* enable 3v6 for GBF chip */
+       if ((raise_ab8500_gpio16() < 0))
+               printf("error: cant' raise GPIO16\n");
+
+       return 0;
+}
index d3ca55dce1b09479dc399a6ad11e07226d4170c9..ed70d65dfcd2a165835f3a947e8e71fff6dc11e3 100644 (file)
@@ -32,6 +32,7 @@
 #define CONFIG_SYS_ICACHE_OFF
 #define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_ARCH_CPU_INIT
+#define CONFIG_BOARD_LATE_INIT
 
 /*
  * High Level Configuration Options