]> git.sur5r.net Git - u-boot/commitdiff
stm32: stm32f7: add spl build support
authorVikas Manocha <vikas.manocha@st.com>
Sun, 28 May 2017 19:55:10 +0000 (12:55 -0700)
committerTom Rini <trini@konsulko.com>
Fri, 9 Jun 2017 15:23:55 +0000 (11:23 -0400)
This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
- spl U-Boot : 0x0800_0000
- standard U-Boot : 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini <trini@konsulko.com>
arch/arm/mach-stm32/Kconfig
board/st/stm32f746-disco/stm32f746-disco.c
configs/stm32f746-disco_defconfig
drivers/pinctrl/Kconfig
include/configs/stm32f746-disco.h

index ec6b3ff2dff047acded6dd1473e7fe581389db1f..a3390d0bfd4aa915824abd1fd04d785bc1c200c3 100644 (file)
@@ -8,6 +8,23 @@ config STM32F1
 
 config STM32F7
        bool "stm32f7 family"
+       select SUPPORT_SPL
+       select SPL
+       select SPL_CLK
+       select SPL_DM
+       select SPL_DM_SEQ_ALIAS
+       select SPL_DRIVERS_MISC_SUPPORT
+       select SPL_GPIO_SUPPORT
+       select SPL_LIBCOMMON_SUPPORT
+       select SPL_LIBGENERIC_SUPPORT
+       select SPL_MTD_SUPPORT
+       select SPL_OF_CONTROL
+       select SPL_OF_LIBFDT
+       select SPL_OF_TRANSLATE
+       select SPL_PINCTRL
+       select SPL_RAM
+       select SPL_SERIAL_SUPPORT
+       select SPL_SYS_MALLOC_SIMPLE
 
 source "arch/arm/mach-stm32/stm32f4/Kconfig"
 source "arch/arm/mach-stm32/stm32f1/Kconfig"
index 7a6d93cb676a8a4c4eb62b29906024f7a37977d0..87fa5eb48e27e6779eb8b69ea9c23ffc77cbe376 100644 (file)
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <ram.h>
+#include <spl.h>
 #include <asm/io.h>
 #include <asm/armv7m.h>
 #include <asm/arch/stm32.h>
@@ -36,16 +37,18 @@ int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
 }
 int dram_init(void)
 {
-       struct udevice *dev;
        int rv;
        fdt_addr_t mr_base, mr_size;
 
+#ifndef CONFIG_SUPPORT_SPL
+       struct udevice *dev;
        rv = uclass_get_device(UCLASS_RAM, 0, &dev);
        if (rv) {
                debug("DRAM init failed: %d\n", rv);
                return rv;
        }
 
+#endif
        rv = get_memory_base_size(&mr_base, &mr_size);
        if (rv)
                return rv;
@@ -87,6 +90,28 @@ int board_early_init_f(void)
 }
 #endif
 
+#ifdef CONFIG_SPL_BUILD
+int spl_dram_init(void)
+{
+       struct udevice *dev;
+       int rv;
+       rv = uclass_get_device(UCLASS_RAM, 0, &dev);
+       if (rv)
+               debug("DRAM init failed: %d\n", rv);
+       return rv;
+}
+void spl_board_init(void)
+{
+       spl_dram_init();
+       preloader_console_init();
+       arch_cpu_init(); /* to configure mpu for sdram rw permissions */
+}
+u32 spl_boot_device(void)
+{
+       return BOOT_DEVICE_NOR;
+}
+
+#endif
 u32 get_board_rev(void)
 {
        return 0;
index a334d504edeb48ec05ad390a893d3cfac969c4d2..766b11153811de243dae6f324ac96d7c0f812b13 100644 (file)
@@ -39,7 +39,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_FULL is not set
 CONFIG_PINCTRL_STM32=y
-# CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_OF_LIBFDT_OVERLAY=y
index 150c68d794e8c611e6a9bf3f3687bb3fecd4db05..f948783170f696477046cfa6ee741fbb3255ff83 100644 (file)
@@ -69,6 +69,7 @@ config SPL_PINCTRL
 config SPL_PINCTRL_FULL
        bool "Support full pin controllers in SPL"
        depends on SPL_PINCTRL && SPL_OF_CONTROL
+       default n if TARGET_STM32F746_DISCO
        default y
        help
          This option is an SPL-variant of the PINCTRL_FULL option.
index 1ee58156e0e3f60652db50464f47dcfb58ff5af2..055fdf8ef01d5f009754834b11bc2089f8aa7f32 100644 (file)
 
 #define CONFIG_SYS_FLASH_BASE          0x08000000
 #define CONFIG_SYS_INIT_SP_ADDR                0x20050000
-#define CONFIG_SYS_TEXT_BASE           0x08000000
+
+#ifdef CONFIG_SUPPORT_SPL
+#define CONFIG_SYS_TEXT_BASE           0xC0000000
+#else
+#define CONFIG_SYS_TEXT_BASE           CONFIG_SYS_FLASH_BASE
+#endif
 
 /*
  * Configuration of the external SDRAM memory
 #define CONFIG_CMD_CACHE
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_DISPLAY_BOARDINFO
+
+/* For SPL */
+#ifdef CONFIG_SUPPORT_SPL
+#define CONFIG_SPL_STACK               CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_TEXT_BASE           CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_MONITOR_LEN         (512 * 1024)
+#define CONFIG_SYS_SPL_LEN             0x00008000
+#define CONFIG_SYS_UBOOT_START         0XC00003FD
+#define CONFIG_SYS_UBOOT_BASE          (CONFIG_SYS_FLASH_BASE + \
+                                        CONFIG_SYS_SPL_LEN)
+#endif
+/* For SPL ends */
+
 #endif /* __CONFIG_H */