]> git.sur5r.net Git - u-boot/commitdiff
dm: x86: baytrail: Correct PCI region 3 when driver model is used
authorSimon Glass <sjg@chromium.org>
Sat, 4 Jul 2015 00:28:27 +0000 (18:28 -0600)
committerSimon Glass <sjg@chromium.org>
Wed, 15 Jul 2015 00:03:19 +0000 (18:03 -0600)
Commit afbbd413a fixed this for non-driver-model. Make sure that the driver
model code handles this also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/cpu/cpu.c
drivers/pci/pci-uclass.c
include/asm-generic/global_data.h

index 9afdafb17ebeab0a929e718243327d81fa61bd4b..af927b94e0839b9211393cbd536046a7214d3c61 100644 (file)
@@ -353,6 +353,8 @@ int x86_cpu_init_f(void)
 
                gd->arch.has_mtrr = has_mtrr();
        }
+       /* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */
+       gd->pci_ram_top = 0x80000000U;
 
        /* Configure fixed range MTRRs for some legacy regions */
        if (gd->arch.has_mtrr) {
index edec93f9a47c89296d85d258bf66ce5b5a8eb7c5..5b91fe3dcecfdbdb783e0824ec820a80d524081e 100644 (file)
@@ -444,6 +444,7 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
 {
        int pci_addr_cells, addr_cells, size_cells;
        int cells_per_record;
+       phys_addr_t addr;
        const u32 *prop;
        int len;
        int i;
@@ -494,8 +495,11 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
        }
 
        /* Add a region for our local memory */
-       pci_set_region(hose->regions + hose->region_count++, 0, 0,
-                      gd->ram_size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+       addr = gd->ram_size;
+       if (gd->pci_ram_top && gd->pci_ram_top < addr)
+               addr = gd->pci_ram_top;
+       pci_set_region(hose->regions + hose->region_count++, 0, 0, addr,
+                      PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 
        return 0;
 }
index 6747619b1c7868ce946660619e4bbe694bcae577..db0550b67cb44bad712e49851e3b1ad7101a22ea 100644 (file)
@@ -93,6 +93,7 @@ typedef struct global_data {
 #endif
 #ifdef CONFIG_PCI
        struct pci_controller *hose;    /* PCI hose for early use */
+       phys_addr_t pci_ram_top;        /* top of region accessible to PCI */
 #endif
 #ifdef CONFIG_PCI_BOOTDELAY
        int pcidelay_done;