sunxi: spl: deassert the NAND controller reset line

Ensure the NAND controller reset line is deasserted before use.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index e08e22f30c0ade2256f69a15e3b7f1db01159677..ee3bfdac6dc4c25106171f8da17fca79432bdce0 100644 (file)
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -286,6 +286,10 @@ static void nand_clock_setup(void)
                (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 
        setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0));
+#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I || \
+    defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I
+       setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0));
+#endif
 #ifdef CONFIG_MACH_SUN9I
        setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA));
 #else