]> git.sur5r.net Git - u-boot/commitdiff
SPI: mxc_spi: remove second reset from ECSPI config handler
authorMarkus Niebel <Markus.Niebel@tq-group.com>
Thu, 23 Oct 2014 14:09:38 +0000 (16:09 +0200)
committerJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Mon, 27 Oct 2014 17:07:03 +0000 (22:37 +0530)
the second reset prevents other registers to be written.
This will prevent to have the correct signal levels for
SCLK before writing to the config reg in spi_xchg_single.

Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
drivers/spi/mxc_spi.c

index be102692d446450528886c998440ecefc8a32fbf..523c7af20466f602e98f7bd106cefc2b846d5b64 100644 (file)
@@ -169,9 +169,6 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
        reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_POSTDIV(0x0F)) |
                MXC_CSPICTRL_POSTDIV(post_div);
 
-       /* We need to disable SPI before changing registers */
-       reg_ctrl &= ~MXC_CSPICTRL_EN;
-
        if (mode & SPI_CS_HIGH)
                ss_pol = 1;