]> git.sur5r.net Git - u-boot/commitdiff
ddr: altera: Tweak DQS tracking enable handling
authorMarek Vasut <marex@denx.de>
Tue, 5 Apr 2016 21:41:56 +0000 (23:41 +0200)
committerMarek Vasut <marex@denx.de>
Wed, 20 Apr 2016 09:28:44 +0000 (11:28 +0200)
In the most unlikely case the DQS tracking was to be disabled,
make sure we do not errornously re-enable it. Note that DQS
tracking is enabled on all systems observed thus far.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
drivers/ddr/altera/sequencer.c

index 34b1aa79fb86098cedc556e63db3c696ad1a159d..bf74b4e6518355eb3463be2e40c2b90708ba9cff 100644 (file)
@@ -3479,6 +3479,7 @@ grp_failed:               /* A group failed, increment the counter. */
 static int run_mem_calibrate(void)
 {
        int pass;
+       u32 ctrl_cfg;
 
        debug("%s:%d\n", __func__, __LINE__);
 
@@ -3486,7 +3487,9 @@ static int run_mem_calibrate(void)
        writel(PHY_MGR_CAL_RESET, &phy_mgr_cfg->cal_status);
 
        /* Stop tracking manager. */
-       clrbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK);
+       ctrl_cfg = readl(&sdr_ctrl->ctrl_cfg);
+       writel(ctrl_cfg & ~SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK,
+              &sdr_ctrl->ctrl_cfg);
 
        phy_mgr_initialize();
        rw_mgr_mem_initialize();
@@ -3507,7 +3510,7 @@ static int run_mem_calibrate(void)
        writel(0x2, &phy_mgr_cfg->mux_sel);
 
        /* Start tracking manager. */
-       setbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK);
+       writel(ctrl_cfg, &sdr_ctrl->ctrl_cfg);
 
        return pass;
 }