Merge branch 'master' of git://git.denx.de/u-boot-arm

diff --git a/arch/sparc/cpu/leon2/cpu_init.c b/arch/sparc/cpu/leon2/cpu_init.c
index de310fbbbb727e6a39b7575d11b1e3727901bb87..6e07fe6bb40e6f086bf1fbf16ff934d1c392bafd 100644 (file)
--- a/arch/sparc/cpu/leon2/cpu_init.c
+++ b/arch/sparc/cpu/leon2/cpu_init.c
@@ -13,6 +13,9 @@
 
 #include <config.h>
 
+#define TIMER_BASE_CLK 1000000
+#define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /* reset CPU (jump to 0, without reset) */
@@ -90,7 +93,7 @@ void cpu_wait_ticks(unsigned long ticks)
        while (get_timer(start) < ticks) ;
 }
 
-/* initiate and setup timer0 interrupt to 1MHz
+/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
  * Return irq number for timer int or a negative number for
  * dealing with self
  */
@@ -98,28 +101,31 @@ int timer_interrupt_init_cpu(void)
 {
        LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
 
-       /* 1ms ticks */
+       /* SYS_HZ ticks per second */
        leon2->Timer_Counter_1 = 0;
-       leon2->Timer_Reload_1 = 999;    /* (((1000000 / 100) - 1)) */
+       leon2->Timer_Reload_1 = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
        leon2->Timer_Control_1 =
            (LEON2_TIMER_CTRL_EN | LEON2_TIMER_CTRL_RS | LEON2_TIMER_CTRL_LD);
 
        return LEON2_TIMER1_IRQNO;
 }
 
+ulong get_tbclk(void)
+{
+       return TIMER_BASE_CLK;
+}
+
 /*
  * This function is intended for SHORT delays only.
  */
 unsigned long cpu_usec2ticks(unsigned long usec)
 {
-       /* timer set to 1kHz ==> 1 clk tick = 1 msec */
-       if (usec < 1000)
+       if (usec < US_PER_TICK)
                return 1;
-       return (usec / 1000);
+       return usec / US_PER_TICK;
 }
 
 unsigned long cpu_ticks2usec(unsigned long ticks)
 {
-       /* 1tick = 1usec */
-       return ticks * 1000;
+       return ticks * US_PER_TICK;
 }

diff --git a/arch/sparc/cpu/leon3/cpu_init.c b/arch/sparc/cpu/leon3/cpu_init.c
index 4720f42a93f8b8cb7f2acaf22a7e0edeaf7f8309..2f41d8847bdc2749901a91afe7415a7e6f0d0893 100644 (file)
--- a/arch/sparc/cpu/leon3/cpu_init.c
+++ b/arch/sparc/cpu/leon3/cpu_init.c
@@ -14,6 +14,9 @@
 
 #include <config.h>
 
+#define TIMER_BASE_CLK 1000000
+#define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /* reset CPU (jump to 0, without reset) */
@@ -203,15 +206,15 @@ void cpu_wait_ticks(unsigned long ticks)
        while (get_timer(start) < ticks) ;
 }
 
-/* initiate and setup timer0 interrupt to 1MHz
+/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
  * Return irq number for timer int or a negative number for
  * dealing with self
  */
 int timer_interrupt_init_cpu(void)
 {
-       /* 1ms ticks */
+       /* SYS_HZ ticks per second */
        gptimer->e[0].val = 0;
-       gptimer->e[0].rld = 999;        /* (((1000000 / 100) - 1)) */
+       gptimer->e[0].rld = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
        gptimer->e[0].ctrl =
            (LEON3_GPTIMER_EN |
             LEON3_GPTIMER_RL | LEON3_GPTIMER_LD | LEON3_GPTIMER_IRQEN);
@@ -219,19 +222,22 @@ int timer_interrupt_init_cpu(void)
        return gptimer_irq;
 }
 
+ulong get_tbclk(void)
+{
+       return TIMER_BASE_CLK;
+}
+
 /*
  * This function is intended for SHORT delays only.
  */
 unsigned long cpu_usec2ticks(unsigned long usec)
 {
-       /* timer set to 1kHz ==> 1 clk tick = 1 msec */
-       if (usec < 1000)
+       if (usec < US_PER_TICK)
                return 1;
-       return (usec / 1000);
+       return usec / US_PER_TICK;
 }
 
 unsigned long cpu_ticks2usec(unsigned long ticks)
 {
-       /* 1tick = 1usec */
-       return ticks * 1000;
+       return ticks * US_PER_TICK;
 }

diff --git a/drivers/i2c/zynq_i2c.c b/drivers/i2c/zynq_i2c.c
index f1f65131a2a93166afffcb053e4d607029180a08..b3264af4526eb778262313334eca4d5ce4141ff4 100644 (file)
--- a/drivers/i2c/zynq_i2c.c
+++ b/drivers/i2c/zynq_i2c.c
@@ -142,7 +142,7 @@ static u32 zynq_i2c_wait(struct zynq_i2c_registers *zynq_i2c, u32 mask)
                        break;
        }
 #ifdef DEBUG
-       zynq_i2c_debug_status(zynq_i2c));
+       zynq_i2c_debug_status(zynq_i2c);
 #endif
        /* Clear interrupt status flags */
        writel(int_status & mask, &zynq_i2c->interrupt_status);
@@ -235,7 +235,7 @@ static int zynq_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr,
        clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
 
 #ifdef DEBUG
-       zynq_i2c_debug_status();
+       zynq_i2c_debug_status(zynq_i2c);
 #endif
        return 0;
 }