arm: Show cache warnings in U-Boot proper only

Avoid bloating the SPL image size.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 642a95242b364cc5016a4e2ac3e893f6b35d6187..d330b09434a46df1ab6505bf8b46c54e90ccfa21 100644 (file)
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -61,8 +61,8 @@ int check_cache_range(unsigned long start, unsigned long stop)
                ok = 0;
 
        if (!ok) {
-               debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
-                     start, stop);
+               warn_non_spl("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
+                            start, stop);
        }
 
        return ok;