ppc: Fix roll over bug in flush_cache()

If we call flush_cache(0xfffff000, 0x1000) it would never
terminate the loop since end = 0xffffffff and we'd roll over
our counter from 0xfffffe0 to 0 (assuming a 32-byte cache line)

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/lib_ppc/cache.c b/lib_ppc/cache.c
index 1292b71e6ef206321b0ecb36d7c3fc5d2a408548..338b08bd77005f0b477ad594ce1c37d588943bf2 100644 (file)
--- a/lib_ppc/cache.c
+++ b/lib_ppc/cache.c
@@ -33,14 +33,16 @@ void flush_cache(ulong start_addr, ulong size)
        start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
        end = start_addr + size - 1;
 
-       for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) {
+       for (addr = start; (addr <= end) && (addr >= start);
+                       addr += CONFIG_SYS_CACHELINE_SIZE) {
                asm volatile("dcbst 0,%0" : : "r" (addr) : "memory");
                WATCHDOG_RESET();
        }
        /* wait for all dcbst to complete on bus */
        asm volatile("sync" : : : "memory");
 
-       for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) {
+       for (addr = start; (addr <= end) && (addr >= start);
+                       addr += CONFIG_SYS_CACHELINE_SIZE) {
                asm volatile("icbi 0,%0" : : "r" (addr) : "memory");
                WATCHDOG_RESET();
        }