]> git.sur5r.net Git - u-boot/commitdiff
armv8: fsl-layerscape: Put SATA code under SATA configs
authorAshish Kumar <Ashish.Kumar@nxp.com>
Fri, 18 Aug 2017 05:24:35 +0000 (10:54 +0530)
committerYork Sun <york.sun@nxp.com>
Fri, 22 Sep 2017 19:41:24 +0000 (12:41 -0700)
It is not necessary for every SoC to have 2 SATA controller.
So put SATA1, SATA2 code under respective defines.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/soc.c

index 6698c0467d7c0240f2711b14457b2a7088668367..7e5a6baf59f4a2babbe255bdc6a21b257edd28ad 100644 (file)
@@ -323,11 +323,14 @@ int sata_init(void)
 {
        struct ccsr_ahci __iomem *ccsr_ahci;
 
+#ifdef CONFIG_SYS_SATA2
        ccsr_ahci  = (void *)CONFIG_SYS_SATA2;
        out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
        out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
        out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG);
+#endif
 
+#ifdef CONFIG_SYS_SATA1
        ccsr_ahci  = (void *)CONFIG_SYS_SATA1;
        out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
        out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
@@ -335,6 +338,7 @@ int sata_init(void)
 
        ahci_init((void __iomem *)CONFIG_SYS_SATA1);
        scsi_scan(false);
+#endif
 
        return 0;
 }