* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 3 /* Port D */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define CONFIG_SYS_MDIO_PIN 0x00040000 /* PD13 */
#define CONFIG_SYS_MDC_PIN 0x00080000 /* PD12 */
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 2 /* Port C */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
#if CONFIG_ADSTYPE == CONFIG_SYS_8272ADS
#define CONFIG_SYS_MDIO_PIN 0x00002000 /* PC18 */
* Port pins used for bit-banged MII communictions (if applicable).
*/
#define MDIO_PORT 2 /* Port C */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 2 /* Port C */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 2 /* Port C */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 2 /* Port C */
+ #define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+ #define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 2 /* Port C */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
#if STK82xx_150
#define CONFIG_SYS_MDIO_PIN 0x00008000 /* PC16 */
#define CONFIG_BITBANGMII
#define MDIO_PORT 1 /* Port B */
+
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define CONFIG_SYS_MDIO_PIN 0x00002000 /* PB18 */
#define CONFIG_SYS_MDC_PIN 0x00001000 /* PB19 */
#define MDIO_ACTIVE (iop->pdir |= CONFIG_SYS_MDIO_PIN)
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 2 /* Port C */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 0 /* Not used - implemented in BCSR */
+
#define MDIO_ACTIVE (*(vu_char *)(CONFIG_SYS_BCSR + 8) &= 0xFB)
#define MDIO_TRISTATE (*(vu_char *)(CONFIG_SYS_BCSR + 8) |= 0x04)
#define MDIO_READ (*(vu_char *)(CONFIG_SYS_BCSR + 8) & 1)
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 0 /* Not used - implemented in BCSR */
+
#define MDIO_ACTIVE (*(vu_char *)(CONFIG_SYS_BCSR + 8) &= 0xFB)
#define MDIO_TRISTATE (*(vu_char *)(CONFIG_SYS_BCSR + 8) |= 0x04)
#define MDIO_READ (*(vu_char *)(CONFIG_SYS_BCSR + 8) & 1)
* Port pins used for bit-banged MII communictions (if applicable).
*/
#define MDIO_PORT 2 /* Port C */
+
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
# define MDIO_PORT 0 /* Port A */
+# define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+# define MDC_DECLARE MDIO_DECLARE
+
# define MDIO_DATA_PINMASK 0x00040000 /* Pin 13 */
# define MDIO_CLCK_PINMASK 0x00080000 /* Pin 12 */
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
# define MDIO_PORT 0 /* Port A */
+# define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+# define MDC_DECLARE MDIO_DECLARE
+
# define MDIO_DATA_PINMASK 0x00000040 /* Pin 25 */
# define MDIO_CLCK_PINMASK 0x00000080 /* Pin 24 */
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
# define MDIO_PORT 0 /* Port A */
+# define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+# define MDC_DECLARE MDIO_DECLARE
+
# define MDIO_DATA_PINMASK 0x00000100 /* Pin 23 */
# define MDIO_CLCK_PINMASK 0x00000200 /* Pin 22 */
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 0 /* Port A */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define CONFIG_SYS_MDIO_PIN 0x00200000 /* PA10 */
#define CONFIG_SYS_MDC_PIN 0x00400000 /* PA9 */
* Port pins used for bit-banged MII communictions (if applicable).
*/
#define MDIO_PORT 2 /* Port C */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
*/
#define MDIO_PORT 2 /* Port A=0, B=1, C=2, D=3 */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x40000000)
#define MDIO_TRISTATE (iop->pdir &= ~0x40000000)
#define MDIO_READ ((iop->pdat & 0x40000000) != 0)
* Port pins used for bit-banged MII communictions (if applicable).
*/
#define MDIO_PORT 2 /* Port C */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
* GPIO pins used for bit-banged MII communications
*/
#define MDIO_PORT 2 /* Port C */
+ #define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+ #define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)