#define PCI_CFG_PIIX4_PIRQRCB 0x61
#define PCI_CFG_PIIX4_PIRQRCC 0x62
#define PCI_CFG_PIIX4_PIRQRCD 0x63
+#define PCI_CFG_PIIX4_SERIRQC 0x64
+#define PCI_CFG_PIIX4_GENCFG 0xb0
+
+#define PCI_CFG_PIIX4_SERIRQC_EN (1 << 7)
+#define PCI_CFG_PIIX4_SERIRQC_CONT (1 << 6)
+
+#define PCI_CFG_PIIX4_GENCFG_SERIRQ (1 << 16)
#endif /* _MIPS_ASM_MALTA_H */
void pci_init_board(void)
{
pci_dev_t bdf;
+ u32 val32;
+ u8 val8;
switch (malta_sys_con()) {
case SYSCON_GT64120:
pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCB, 10);
pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCC, 11);
pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCD, 11);
+
+ /* mux SERIRQ onto SERIRQ pin */
+ pci_read_config_dword(bdf, PCI_CFG_PIIX4_GENCFG, &val32);
+ val32 |= PCI_CFG_PIIX4_GENCFG_SERIRQ;
+ pci_write_config_dword(bdf, PCI_CFG_PIIX4_GENCFG, val32);
+
+ /* enable SERIRQ - Linux currently depends upon this */
+ pci_read_config_byte(bdf, PCI_CFG_PIIX4_SERIRQC, &val8);
+ val8 |= PCI_CFG_PIIX4_SERIRQC_EN | PCI_CFG_PIIX4_SERIRQC_CONT;
+ pci_write_config_byte(bdf, PCI_CFG_PIIX4_SERIRQC, val8);
}