]> git.sur5r.net Git - u-boot/commitdiff
mpc83xx: add OF_FLAT_TREE bits to 83xx boards
authorKim Phillips <kim.phillips@freescale.com>
Wed, 1 Nov 2006 06:10:40 +0000 (00:10 -0600)
committerKim Phillips <kim.phillips@freescale.com>
Sat, 4 Nov 2006 01:42:22 +0000 (19:42 -0600)
add ft_pci_setup, OF_CPU, OF_SOC, OF_TBCLK, and
STDOUT_PATH configuration bits to mpc8349emds,
mpc8349itx, and mpc8360emds board code.

redo environment to use bootm with the fdtaddr
for booting ARCH=powerpc kernels by default,
and provide default fdtaddr values.

board/mpc8349emds/mpc8349emds.c
board/mpc8349emds/pci.c
board/mpc8349itx/mpc8349itx.c
board/mpc8349itx/pci.c
board/mpc8360emds/mpc8360emds.c
board/mpc8360emds/pci.c
include/configs/MPC8349EMDS.h
include/configs/MPC8349ITX.h
include/configs/MPC8360EMDS.h

index 6b3dedcbd9fea00a2392f58e88ce39664b9829f0..ed7b71d0861fcd60b9467c1fcc468c4b02cd2bb4 100644 (file)
 #if defined(CONFIG_SPD_EEPROM)
 #include <spd_sdram.h>
 #endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
+
 int fixed_sdram(void);
 void sdram_init(void);
 
@@ -564,3 +568,23 @@ U_BOOT_CMD(
        "  - re-inits memory"
 );
 #endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+       u32 *p;
+       int len;
+
+#ifdef CONFIG_PCI
+       ft_pci_setup(blob, bd);
+#endif
+       ft_cpu_setup(blob, bd);
+
+       p = ft_get_prop(blob, "/memory/reg", &len);
+       if (p != NULL) {
+               *p++ = cpu_to_be32(bd->bi_memstart);
+               *p = cpu_to_be32(bd->bi_memsize);
+       }
+}
+#endif
index 93827f11d8618573d423b0096e5c55e50b37f537..908be5754614d0d3e8ce3d8f390288c89e0e6688 100644 (file)
@@ -385,4 +385,26 @@ pci_init_board(void)
 
 }
 
+#ifdef CONFIG_OF_FLAT_TREE
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+               u32 *p;
+               int len;
+
+               p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+               if (p != NULL) {
+               p[0] = pci_hose[0].first_busno;
+               p[1] = pci_hose[0].last_busno;
+               }
+
+#ifdef CONFIG_MPC83XX_PCI2
+       p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
+       if (p != NULL) {
+               p[0] = pci_hose[1].first_busno;
+               p[1] = pci_hose[1].last_busno;
+       }
+#endif
+}
+#endif /* CONFIG_OF_FLAT_TREE */
 #endif /* CONFIG_PCI */
index 466264588679c674f3e4adc703ae5abd125d2f72..9fce973df0c9840c02b8340cd7c0a90391a3c5d1 100644 (file)
@@ -37,6 +37,9 @@
 #else
 #include <asm/mmu.h>
 #endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
 
 #ifndef CONFIG_SPD_EEPROM
 /*************************************************************************
@@ -459,3 +462,23 @@ int misc_init_r(void)
 
        return rc;
 }
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+       u32 *p;
+       int len;
+
+#ifdef CONFIG_PCI
+       ft_pci_setup(blob, bd);
+#endif
+       ft_cpu_setup(blob, bd);
+
+       p = ft_get_prop(blob, "/memory/reg", &len);
+       if (p != NULL) {
+               *p++ = cpu_to_be32(bd->bi_memstart);
+               *p = cpu_to_be32(bd->bi_memsize);
+       }
+}
+#endif
index cf07020b628386b2288cb788c84a68f9f48ccf04..b4637bc8cdfd165c53510a4914502ab5aa2f458c 100644 (file)
@@ -330,3 +330,25 @@ void pci_init_board(void)
 }
 
 #endif                         /* CONFIG_PCI */
+#ifdef CONFIG_OF_FLAT_TREE
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+               u32 *p;
+               int len;
+
+               p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+               if (p != NULL) {
+               p[0] = pci_hose[0].first_busno;
+               p[1] = pci_hose[0].last_busno;
+               }
+
+#ifdef CONFIG_MPC83XX_PCI2
+       p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
+       if (p != NULL) {
+               p[0] = pci_hose[1].first_busno;
+               p[1] = pci_hose[1].last_busno;
+       }
+#endif
+}
+#endif /* CONFIG_OF_FLAT_TREE */
index 5eadcd39eb8b265c4a98ed7cb6cf4d5a519631d2..5bbaa5cf2e9a384547bfd38e9551b0e010ee367f 100644 (file)
@@ -28,6 +28,9 @@
 #else
 #include <asm/mmu.h>
 #endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
 
 const qe_iop_conf_t qe_iop_conf_tab[] = {
        /* GETH1 */
@@ -628,3 +631,23 @@ U_BOOT_CMD(ecc, 4, 0, do_ecc,
           "  - writes pattern with word access, generates error\n"
           "  - disables injects\n" "  - re-inits memory");
 #endif                         /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+       u32 *p;
+       int len;
+
+#ifdef CONFIG_PCI
+       ft_pci_setup(blob, bd);
+#endif
+       ft_cpu_setup(blob, bd);
+
+       p = ft_get_prop(blob, "/memory/reg", &len);
+       if (p != NULL) {
+               *p++ = cpu_to_be32(bd->bi_memstart);
+               *p = cpu_to_be32(bd->bi_memsize);
+       }
+}
+#endif
index 64ea50979d20c789ed7ec55373ef327924a3e8f1..c81e7a64edac58e1b9fd0a6649c1b31955f2b505 100644 (file)
@@ -234,6 +234,10 @@ void pci_init_board(void)
        if(orig_i2c_bus != 2)
                i2c_set_bus_num(orig_i2c_bus);
 
+       /* Reset to original I2C bus */
+       if(orig_i2c_bus != 2)
+               i2c_set_bus_num(orig_i2c_bus);
+
        /*
         * Release PCI RST Output signal
         */
@@ -298,4 +302,19 @@ void pci_init_board(void)
        hose->last_busno = pci_hose_scan(hose);
 }
 #endif                         /* CONFIG_PCISLAVE */
+
+#ifdef CONFIG_OF_FLAT_TREE
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+               u32 *p;
+               int len;
+
+               p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+               if (p != NULL) {
+               p[0] = hose[0].first_busno;
+               p[1] = hose[0].last_busno;
+               }
+}
+#endif                         /* CONFIG_OF_FLAT_TREE */
 #endif                         /* CONFIG_PCI */
index 4d5ad57192bdf77ce9768e570ce5750c791a648d..e68c41accf5c5dd5ab0668dda1484bf7a4f28ef5 100644 (file)
@@ -35,6 +35,7 @@
  * High Level Configuration Options
  */
 #define CONFIG_E300            1       /* E300 Family */
+#define CONFIG_MPC83XX         1       /* MPC83XX family */
 #define CONFIG_MPC834X         1       /* MPC834X family */
 #define CONFIG_MPC8349         1       /* MPC8349 specific */
 #define CONFIG_MPC8349EMDS     1       /* MPC8349EMDS board specific */
 #endif
 #endif
 
+#define CFG_SCCR_INIT          (SCCR_DEFAULT & (~SCCR_CLK_MASK))
+#define CFG_SCCR_TSEC1CM       SCCR_TSEC1CM_1  /* TSEC1 clock setting */
+#define CFG_SCCR_TSEC2CM       SCCR_TSEC2CM_1  /* TSEC2 clock setting */
+#define CFG_SCCR_ENCCM         SCCR_ENCCM_3    /* ENC clock setting */
+#define CFG_SCCR_USBCM         SCCR_USBCM_3    /* USB clock setting */
+#define CFG_SCCR_VAL           ( CFG_SCCR_INIT         \
+                               | CFG_SCCR_TSEC1CM      \
+                               | CFG_SCCR_TSEC2CM      \
+                               | CFG_SCCR_ENCCM        \
+                               | CFG_SCCR_USBCM        )
+
 #define CONFIG_BOARD_EARLY_INIT_F              /* call board_pre_init */
 
 #define CFG_IMMRBAR            0xE0000000
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE    1
+#define CONFIG_OF_BOARD_SETUP  1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE  8192
+
+#define OF_CPU                 "PowerPC,8349@0"
+#define OF_SOC                 "soc8349@e0000000"
+#define OF_TBCLK               (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH         "/soc8349@e0000000/serial@4500"
+
 /* I2C */
 #define CONFIG_HARD_I2C                        /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CONFIG_ETH1ADDR                00:E0:0C:00:7E:21
 #endif
 
-#define CONFIG_IPADDR          192.168.205.5
+#define CONFIG_IPADDR          192.168.1.253
 
 #define CONFIG_HOSTNAME                mpc8349emds
-#define CONFIG_ROOTPATH                /opt/eldk/ppc_6xx
-#define CONFIG_BOOTFILE                /tftpboot/tqm83xx/uImage
+#define CONFIG_ROOTPATH                /nfsroot/rootfs
+#define CONFIG_BOOTFILE                uImage
 
 #define CONFIG_SERVERIP                192.168.1.1
 #define CONFIG_GATEWAYIP       192.168.1.1
                "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
        "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"     \
                "bootm\0"                                               \
-       "rootpath=/opt/eldk/ppc_6xx\0"                                  \
-       "bootfile=/tftpboot/mpc8349emds/uImage\0"                       \
        "load=tftp 100000 /tftpboot/mpc8349emds/u-boot.bin\0"           \
        "update=protect off fe000000 fe03ffff; "                        \
                "era fe000000 fe03ffff; cp.b 100000 fe000000 ${filesize}\0"     \
        "upd=run load;run update\0"                                     \
+       "fdtaddr=400000\0"                                              \
+       "fdtfile=mpc8349emds.dtb\0"                                     \
        ""
 
+#define CONFIG_NFSBOOTCOMMAND                                          \
+   "setenv bootargs root=/dev/nfs rw "                                  \
+      "nfsroot=$serverip:$rootpath "                                    \
+      "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+      "console=$consoledev,$baudrate $othbootargs;"                     \
+   "tftp $loadaddr $bootfile;"                                          \
+   "tftp $fdtaddr $fdtfile;"                                           \
+   "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND                                          \
+   "setenv bootargs root=/dev/ram rw "                                  \
+      "console=$consoledev,$baudrate $othbootargs;"                     \
+   "tftp $ramdiskaddr $ramdiskfile;"                                    \
+   "tftp $loadaddr $bootfile;"                                          \
+   "tftp $fdtaddr $fdtfile;"                                           \
+   "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
 #define CONFIG_BOOTCOMMAND     "run flash_self"
 
 #endif /* __CONFIG_H */
index 2fbc7361823b3230655badb99002725bbaa3bd5b..aaf4d101dce96921938e52fac7b1d395723bc62c 100644 (file)
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE    1
+#define CONFIG_OF_BOARD_SETUP  1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE  8192
+
+#define OF_CPU                 "PowerPC,8349@0"
+#define OF_SOC                 "soc8349@e0000000"
+#define OF_TBCLK               (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH         "/soc8349@e0000000/serial@4500"
 
 #ifdef CONFIG_PCI
 
 #define CONFIG_ETH1ADDR                00:E0:0C:00:8C:02
 #endif
 
-#define CONFIG_IPADDR          10.82.19.159
-#define CONFIG_SERVERIP                10.82.48.106
-#define CONFIG_GATEWAYIP       10.82.19.254
+#define CONFIG_IPADDR          192.168.1.253
+#define CONFIG_SERVERIP                192.168.1.1
+#define CONFIG_GATEWAYIP       192.168.1.1
 #define CONFIG_NETMASK         255.255.252.0
 #define CONFIG_NETDEV          eth0
 
 #define CONFIG_HOSTNAME                mpc8349emitx
-#define CONFIG_ROOTPATH                /nfsroot0/u/timur/itx-ltib/rootfs
-#define CONFIG_BOOTFILE                timur/uImage
+#define CONFIG_ROOTPATH                /nfsroot/rootfs
+#define CONFIG_BOOTFILE                uImage
 
-#define CONFIG_UBOOTPATH       timur/u-boot.bin
+#define CONFIG_UBOOTPATH       u-boot.bin
 #define CONFIG_UBOOTSTART      fe700000
 #define CONFIG_UBOOTEND                fe77ffff
 
                "cmp.b $loadaddr FEF00000 $filesize\0" \
        "tftplinux=tftpboot $loadaddr $bootfile; bootm\0" \
        "copyuboot=erase " MK_STR(CONFIG_UBOOTSTART) " " MK_STR(CONFIG_UBOOTEND) "; " \
-               "cp.b fef00000 " MK_STR(CONFIG_UBOOTSTART) " 80000\0"
+               "cp.b fef00000 " MK_STR(CONFIG_UBOOTSTART) " 80000\0"   \
+        "fdtaddr=400000\0"                                              \
+        "fdtfile=mpc8349emitx.dtb\0"                                    \
+        ""
+
+#define CONFIG_NFSBOOTCOMMAND                                           \
+   "setenv bootargs root=/dev/nfs rw "                                  \
+      "nfsroot=$serverip:$rootpath "                                    \
+      "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+      "console=$consoledev,$baudrate $othbootargs;"                     \
+   "tftp $loadaddr $bootfile;"                                          \
+   "tftp $fdtaddr $fdtfile;"                                            \
+   "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND                                           \
+   "setenv bootargs root=/dev/ram rw "                                  \
+      "console=$consoledev,$baudrate $othbootargs;"                     \
+   "tftp $ramdiskaddr $ramdiskfile;"                                    \
+   "tftp $loadaddr $bootfile;"                                          \
+   "tftp $fdtaddr $fdtfile;"                                            \
+   "bootm $loadaddr $ramdiskaddr $fdtaddr"
 
 
 #undef MK_STR
index 330c3073d221e710713e144d7beb4c23584323c7..feb9cf22f2dc0b8e5a4867c613c6a27e982d95a2 100644 (file)
 #define CFG_SDRAM_BASE         CFG_DDR_BASE
 #define CFG_DDR_SDRAM_BASE     CFG_DDR_BASE
 
+#define CFG_83XX_DDR_USES_CS0
+
 #undef CONFIG_DDR_ECC          /* only for ECC DDR module */
 #define CONFIG_DDR_ECC_CMD     /* Use DDR ECC user commands */
 
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE    1
+#define CONFIG_OF_BOARD_SETUP  1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE  8192
+
+#define OF_CPU                 "PowerPC,8360@0"
+#define OF_SOC                 "soc8360@e0000000"
+#define OF_TBCLK               (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH         "/soc8360@e0000000/serial@4500"
+
 /* I2C */
 #define CONFIG_HARD_I2C                /* I2C with hardware support */
 #undef CONFIG_SOFT_I2C         /* I2C bit-banged */
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
    "netdev=eth0\0"                                                      \
    "consoledev=ttyS0\0"                                                 \
-   "ramdiskaddr=400000\0"                                              \
+   "ramdiskaddr=1000000\0"                                             \
    "ramdiskfile=ramfs.83xx\0"                                          \
+   "fdtaddr=400000\0"                                                  \
+   "fdtfile=mpc8349emds.dtb\0"                                         \
+   ""
 
 #define CONFIG_NFSBOOTCOMMAND                                          \
    "setenv bootargs root=/dev/nfs rw "                                  \
-   "nfsroot=$serverip:$rootpath "                                       \
-   "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off "    \
-   "console=$consoledev,$baudrate $othbootargs;"                        \
+      "nfsroot=$serverip:$rootpath "                                    \
+      "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+      "console=$consoledev,$baudrate $othbootargs;"                     \
    "tftp $loadaddr $bootfile;"                                          \
-   "bootm $loadaddr"
+   "tftp $fdtaddr $fdtfile;"                                           \
+   "bootm $loadaddr - $fdtaddr"
 
-#define CONFIG_RAMBOOTCOMMAND \
+#define CONFIG_RAMBOOTCOMMAND                                          \
    "setenv bootargs root=/dev/ram rw "                                  \
-   "console=$consoledev,$baudrate $othbootargs;"                        \
+      "console=$consoledev,$baudrate $othbootargs;"                     \
    "tftp $ramdiskaddr $ramdiskfile;"                                    \
    "tftp $loadaddr $bootfile;"                                          \
-   "bootm $loadaddr $ramdiskaddr"
+   "tftp $fdtaddr $fdtfile;"                                           \
+   "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
 
 #define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND