]> git.sur5r.net Git - u-boot/commitdiff
arm64: mvebu: Add Armada-80x0 dts/dtsi files
authorStefan Roese <sr@denx.de>
Tue, 25 Oct 2016 08:10:32 +0000 (10:10 +0200)
committerStefan Roese <sr@denx.de>
Mon, 5 Dec 2016 12:28:23 +0000 (13:28 +0100)
Add the latest version of the DT files from the Linux kernel.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
arch/arm/dts/armada-8020.dtsi [new file with mode: 0644]
arch/arm/dts/armada-8040-db.dts [new file with mode: 0644]
arch/arm/dts/armada-8040.dtsi [new file with mode: 0644]
arch/arm/dts/armada-cp110-slave.dtsi [new file with mode: 0644]

diff --git a/arch/arm/dts/armada-8020.dtsi b/arch/arm/dts/armada-8020.dtsi
new file mode 100644 (file)
index 0000000..048e5cf
--- /dev/null
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for the Armada 8020 SoC, made of an AP806 Dual and
+ * two CP110.
+ */
+
+#include "armada-ap806-dual.dtsi"
+#include "armada-cp110-master.dtsi"
+#include "armada-cp110-slave.dtsi"
+
+/ {
+       model = "Marvell Armada 8020";
+       compatible = "marvell,armada8020", "marvell,armada-ap806-dual",
+                    "marvell,armada-ap806";
+};
diff --git a/arch/arm/dts/armada-8040-db.dts b/arch/arm/dts/armada-8040-db.dts
new file mode 100644 (file)
index 0000000..6e6f182
--- /dev/null
@@ -0,0 +1,150 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for Marvell Armada 8040 Development board platform
+ */
+
+#include "armada-8040.dtsi"
+
+/ {
+       model = "Marvell Armada 8040 DB board";
+       compatible = "marvell,armada8040-db", "marvell,armada8040",
+                    "marvell,armada-ap806-quad", "marvell,armada-ap806";
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               reg = <0x0 0x0 0x0 0x80000000>;
+       };
+};
+
+&i2c0 {
+       status = "okay";
+       clock-frequency = <100000>;
+};
+
+&spi0 {
+       status = "okay";
+
+       spi-flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <10000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "U-Boot";
+                               reg = <0 0x200000>;
+                       };
+                       partition@400000 {
+                               label = "Filesystem";
+                               reg = <0x200000 0xce0000>;
+                       };
+               };
+       };
+};
+
+/* Accessible over the mini-USB CON9 connector on the main board */
+&uart0 {
+       status = "okay";
+};
+
+
+/* CON5 on CP0 expansion */
+&cpm_pcie2 {
+       status = "okay";
+};
+
+&cpm_i2c0 {
+       status = "okay";
+       clock-frequency = <100000>;
+};
+
+/* CON4 on CP0 expansion */
+&cpm_sata0 {
+       status = "okay";
+};
+
+/* CON9 on CP0 expansion */
+&cpm_usb3_0 {
+       status = "okay";
+};
+
+/* CON10 on CP0 expansion */
+&cpm_usb3_1 {
+       status = "okay";
+};
+
+/* CON5 on CP1 expansion */
+&cps_pcie2 {
+       status = "okay";
+};
+
+&cps_i2c0 {
+       status = "okay";
+       clock-frequency = <100000>;
+};
+
+/* CON4 on CP1 expansion */
+&cps_sata0 {
+       status = "okay";
+};
+
+/* CON9 on CP1 expansion */
+&cps_usb3_0 {
+       status = "okay";
+};
+
+/* CON10 on CP1 expansion */
+&cps_usb3_1 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/armada-8040.dtsi b/arch/arm/dts/armada-8040.dtsi
new file mode 100644 (file)
index 0000000..9c1b28c
--- /dev/null
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for the Armada 8040 SoC, made of an AP806 Quad and
+ * two CP110.
+ */
+
+#include "armada-ap806-quad.dtsi"
+#include "armada-cp110-master.dtsi"
+#include "armada-cp110-slave.dtsi"
+
+/ {
+       model = "Marvell Armada 8040";
+       compatible = "marvell,armada8040", "marvell,armada-ap806-quad",
+                    "marvell,armada-ap806";
+};
diff --git a/arch/arm/dts/armada-cp110-slave.dtsi b/arch/arm/dts/armada-cp110-slave.dtsi
new file mode 100644 (file)
index 0000000..842fb33
--- /dev/null
@@ -0,0 +1,249 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for Marvell Armada CP110 Slave.
+ */
+
+/ {
+       cp110-slave {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               compatible = "simple-bus";
+               interrupt-parent = <&gic>;
+               ranges;
+
+               config-space {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       interrupt-parent = <&gic>;
+                       ranges = <0x0 0x0 0xf4000000 0x2000000>;
+
+                       cps_syscon0: system-controller@440000 {
+                               compatible = "marvell,cp110-system-controller0",
+                                            "syscon";
+                               reg = <0x440000 0x1000>;
+                               #clock-cells = <2>;
+                               core-clock-output-names =
+                                       "cps-apll", "cps-ppv2-core", "cps-eip",
+                                       "cps-core", "cps-nand-core";
+                               gate-clock-output-names =
+                                       "cps-audio", "cps-communit", "cps-nand",
+                                       "cps-ppv2", "cps-sdio", "cps-mg-domain",
+                                       "cps-mg-core", "cps-xor1", "cps-xor0",
+                                       "cps-gop-dp", "none", "cps-pcie_x10",
+                                       "cps-pcie_x11", "cps-pcie_x4", "cps-pcie-xor",
+                                       "cps-sata", "cps-sata-usb", "cps-main",
+                                       "cps-sd-mmc", "none", "none",
+                                       "cps-slow-io", "cps-usb3h0", "cps-usb3h1",
+                                       "cps-usb3dev", "cps-eip150", "cps-eip197";
+                       };
+
+                       cps_sata0: sata@540000 {
+                               compatible = "marvell,armada-8k-ahci";
+                               reg = <0x540000 0x30000>;
+                               interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cps_syscon0 1 15>;
+                               status = "disabled";
+                       };
+
+                       cps_usb3_0: usb3@500000 {
+                               compatible = "marvell,armada-8k-xhci",
+                                            "generic-xhci";
+                               reg = <0x500000 0x4000>;
+                               dma-coherent;
+                               interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cps_syscon0 1 22>;
+                               status = "disabled";
+                       };
+
+                       cps_usb3_1: usb3@510000 {
+                               compatible = "marvell,armada-8k-xhci",
+                                            "generic-xhci";
+                               reg = <0x510000 0x4000>;
+                               dma-coherent;
+                               interrupts = <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cps_syscon0 1 23>;
+                               status = "disabled";
+                       };
+
+                       cps_xor0: xor@6a0000 {
+                               compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+                               reg = <0x6a0000 0x1000>,
+                                     <0x6b0000 0x1000>;
+                               dma-coherent;
+                               msi-parent = <&gic_v2m0>;
+                               clocks = <&cps_syscon0 1 8>;
+                       };
+
+                       cps_xor1: xor@6c0000 {
+                               compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+                               reg = <0x6c0000 0x1000>,
+                                     <0x6d0000 0x1000>;
+                               dma-coherent;
+                               msi-parent = <&gic_v2m0>;
+                               clocks = <&cps_syscon0 1 7>;
+                       };
+
+                       cps_spi0: spi@700600 {
+                               compatible = "marvell,armada-380-spi";
+                               reg = <0x700600 0x50>;
+                               #address-cells = <0x1>;
+                               #size-cells = <0x0>;
+                               cell-index = <1>;
+                               clocks = <&cps_syscon0 0 3>;
+                               status = "disabled";
+                       };
+
+                       cps_spi1: spi@700680 {
+                               compatible = "marvell,armada-380-spi";
+                               reg = <0x700680 0x50>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <2>;
+                               clocks = <&cps_syscon0 1 21>;
+                               status = "disabled";
+                       };
+
+                       cps_i2c0: i2c@701000 {
+                               compatible = "marvell,mv78230-i2c";
+                               reg = <0x701000 0x20>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cps_syscon0 1 21>;
+                               status = "disabled";
+                       };
+
+                       cps_i2c1: i2c@701100 {
+                               compatible = "marvell,mv78230-i2c";
+                               reg = <0x701100 0x20>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cps_syscon0 1 21>;
+                               status = "disabled";
+                       };
+               };
+
+               cps_pcie0: pcie@f4600000 {
+                       compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+                       reg = <0 0xf4600000 0 0x10000>,
+                             <0 0xfaf00000 0 0x80000>;
+                       reg-names = "ctrl", "config";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       #interrupt-cells = <1>;
+                       device_type = "pci";
+                       dma-coherent;
+                       msi-parent = <&gic_v2m0>;
+
+                       bus-range = <0 0xff>;
+                       ranges =
+                               /* downstream I/O */
+                               <0x81000000 0 0xfd000000 0  0xfd000000 0 0x10000
+                               /* non-prefetchable memory */
+                               0x82000000 0 0xfa000000 0  0xfa000000 0 0xf00000>;
+                       interrupt-map-mask = <0 0 0 0>;
+                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
+                       num-lanes = <1>;
+                       clocks = <&cps_syscon0 1 13>;
+                       status = "disabled";
+               };
+
+               cps_pcie1: pcie@f4620000 {
+                       compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+                       reg = <0 0xf4620000 0 0x10000>,
+                             <0 0xfbf00000 0 0x80000>;
+                       reg-names = "ctrl", "config";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       #interrupt-cells = <1>;
+                       device_type = "pci";
+                       dma-coherent;
+                       msi-parent = <&gic_v2m0>;
+
+                       bus-range = <0 0xff>;
+                       ranges =
+                               /* downstream I/O */
+                               <0x81000000 0 0xfd010000 0  0xfd010000 0 0x10000
+                               /* non-prefetchable memory */
+                               0x82000000 0 0xfb000000 0  0xfb000000 0 0xf00000>;
+                       interrupt-map-mask = <0 0 0 0>;
+                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
+
+                       num-lanes = <1>;
+                       clocks = <&cps_syscon0 1 11>;
+                       status = "disabled";
+               };
+
+               cps_pcie2: pcie@f4640000 {
+                       compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+                       reg = <0 0xf4640000 0 0x10000>,
+                             <0 0xfcf00000 0 0x80000>;
+                       reg-names = "ctrl", "config";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       #interrupt-cells = <1>;
+                       device_type = "pci";
+                       dma-coherent;
+                       msi-parent = <&gic_v2m0>;
+
+                       bus-range = <0 0xff>;
+                       ranges =
+                               /* downstream I/O */
+                               <0x81000000 0 0xfd020000 0  0xfd020000 0 0x10000
+                               /* non-prefetchable memory */
+                               0x82000000 0 0xfc000000 0  0xfc000000 0 0xf00000>;
+                       interrupt-map-mask = <0 0 0 0>;
+                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
+
+                       num-lanes = <1>;
+                       clocks = <&cps_syscon0 1 12>;
+                       status = "disabled";
+               };
+       };
+};