return 0;
}
-#if defined(CONFIG_DISPLAY_CPUINFO)
-static const char *get_cpu_type(void)
-{
- struct mxs_digctl_regs *digctl_regs =
- (struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
-
- switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
- case HW_DIGCTL_CHIPID_MX23:
- return "23";
- case HW_DIGCTL_CHIPID_MX28:
- return "28";
- default:
- return "??";
- }
-}
-
-static const char *get_cpu_rev(void)
+u32 get_cpu_rev(void)
{
struct mxs_digctl_regs *digctl_regs =
(struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
case HW_DIGCTL_CHIPID_MX23:
switch (rev) {
case 0x0:
- return "1.0";
case 0x1:
- return "1.1";
case 0x2:
- return "1.2";
case 0x3:
- return "1.3";
case 0x4:
- return "1.4";
+ return (MXC_CPU_MX23 << 12) | (rev + 0x10);
default:
- return "??";
+ return 0;
}
case HW_DIGCTL_CHIPID_MX28:
switch (rev) {
case 0x1:
- return "1.2";
+ return (MXC_CPU_MX28 << 12) | 0x12;
default:
- return "??";
+ return 0;
}
+ default:
+ return 0;
+ }
+}
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+const char *get_imx_type(u32 imxtype)
+{
+ switch (imxtype) {
+ case MXC_CPU_MX23:
+ return "23"; /* Quad-Plus version of the mx6 */
+ case MXC_CPU_MX28:
+ return "28"; /* Dual-Plus version of the mx6 */
default:
return "??";
}
int print_cpuinfo(void)
{
+ u32 cpurev;
struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
- printf("CPU: Freescale i.MX%s rev%s at %d MHz\n",
- get_cpu_type(),
- get_cpu_rev(),
+ cpurev = get_cpu_rev();
+ printf("CPU: Freescale i.MX%s rev%d.%d at %d MHz\n",
+ get_imx_type((cpurev & 0xFF000) >> 12),
+ (cpurev & 0x000F0) >> 4,
+ (cpurev & 0x0000F) >> 0,
mxc_get_clock(MXC_ARM_CLK) / 1000000);
printf("BOOT: %s\n", mxs_boot_modes[data->boot_mode_idx].mode);
return 0;