{
        return CONFIG_SYS_HZ;
 }
+
+#ifdef CONFIG_HW_WATCHDOG
+static struct davinci_timer * const wdttimer =
+       (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
+
+/*
+ * See prufw2.pdf for using Timer as a WDT
+ */
+void davinci_hw_watchdog_enable(void)
+{
+       writel(0x0, &wdttimer->tcr);
+       writel(0x0, &wdttimer->tgcr);
+       /* TIMMODE = 2h */
+       writel(0x08 | 0x03 | ((TIM_CLK_DIV - 1) << 8), &wdttimer->tgcr);
+       writel(CONFIG_SYS_WDT_PERIOD_LOW, &wdttimer->prd12);
+       writel(CONFIG_SYS_WDT_PERIOD_HIGH, &wdttimer->prd34);
+       writel(2 << 22, &wdttimer->tcr);
+       writel(0x0, &wdttimer->tim12);
+       writel(0x0, &wdttimer->tim34);
+       /* set WDEN bit, WDKEY 0xa5c6 */
+       writel(0xa5c64000, &wdttimer->wdtcr);
+       /* clear counter register */
+       writel(0xda7e4000, &wdttimer->wdtcr);
+}
+
+void davinci_hw_watchdog_reset(void)
+{
+       writel(0xa5c64000, &wdttimer->wdtcr);
+       writel(0xda7e4000, &wdttimer->wdtcr);
+}
+#endif