]> git.sur5r.net Git - u-boot/commitdiff
arm, davinci: add internal WDT support for AM1808 cpus
authorHeiko Schocher <hs@denx.de>
Wed, 14 Sep 2011 19:44:02 +0000 (19:44 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Fri, 30 Sep 2011 20:00:58 +0000 (22:00 +0200)
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
arch/arm/cpu/arm926ejs/davinci/timer.c
arch/arm/include/asm/arch-davinci/timer_defs.h

index 2e7ba4889d199d0ea95956cd5bd63297bb834c3d..c7bf7a5ad2569c58eb699ee4c645480740201791 100644 (file)
@@ -108,3 +108,34 @@ ulong get_tbclk(void)
 {
        return CONFIG_SYS_HZ;
 }
+
+#ifdef CONFIG_HW_WATCHDOG
+static struct davinci_timer * const wdttimer =
+       (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
+
+/*
+ * See prufw2.pdf for using Timer as a WDT
+ */
+void davinci_hw_watchdog_enable(void)
+{
+       writel(0x0, &wdttimer->tcr);
+       writel(0x0, &wdttimer->tgcr);
+       /* TIMMODE = 2h */
+       writel(0x08 | 0x03 | ((TIM_CLK_DIV - 1) << 8), &wdttimer->tgcr);
+       writel(CONFIG_SYS_WDT_PERIOD_LOW, &wdttimer->prd12);
+       writel(CONFIG_SYS_WDT_PERIOD_HIGH, &wdttimer->prd34);
+       writel(2 << 22, &wdttimer->tcr);
+       writel(0x0, &wdttimer->tim12);
+       writel(0x0, &wdttimer->tim34);
+       /* set WDEN bit, WDKEY 0xa5c6 */
+       writel(0xa5c64000, &wdttimer->wdtcr);
+       /* clear counter register */
+       writel(0xda7e4000, &wdttimer->wdtcr);
+}
+
+void davinci_hw_watchdog_reset(void)
+{
+       writel(0xa5c64000, &wdttimer->wdtcr);
+       writel(0xda7e4000, &wdttimer->wdtcr);
+}
+#endif
index 2a20e49c8253f8fdcc0a35dbbfab45d2180a78d9..53c961e8da1573f7068dce2a19bcef5b284abd12 100644 (file)
@@ -37,4 +37,8 @@ struct davinci_timer {
        u_int32_t       wdtcr;
 };
 
+#ifdef CONFIG_HW_WATCHDOG
+void davinci_hw_watchdog_enable(void);
+void davinci_hw_watchdog_reset(void);
+#endif
 #endif /* _TIMER_DEFS_H_ */