armv8/fsl-lsch2: correct the config description of DSPI clock divider

It is derived from Platform clock instead of Platform PLL frequency.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 5825f9b7264e0fccc6d2d11019e437094d476cfb..43b869f1fca012665af054cbf99eeeaaf3546cd6 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -307,7 +307,7 @@ config SYS_FSL_DSPI_CLK_DIV
        default 2
        help
          This is the divider that is used to derive DSPI clock from Platform
-         PLL, in another word DSPI_clk = Platform_PLL_freq / this_divider.
+         clock, in another word DSPI_clk = Platform_clk / this_divider.
 
 config SYS_FSL_DUART_CLK_DIV
        int "DUART clock divider"