]> git.sur5r.net Git - u-boot/commitdiff
mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLY
authorBecky Bruce <becky.bruce@freescale.com>
Wed, 5 Nov 2008 20:55:35 +0000 (14:55 -0600)
committerJon Loeliger <jdl@freescale.com>
Mon, 10 Nov 2008 16:10:04 +0000 (10:10 -0600)
We define CONFIG_MONITOR_BASE_EARLY to define the initial location
of the bootpage in flash.   Use this to create an early mapping
definition for the FLASH, and change the early_bats code to use this.

This  change facilitates the relocation of the flash since the early
mappings are no longer tied to the final location of the flash.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
cpu/mpc86xx/start.S
include/configs/MPC8610HPCD.h
include/configs/MPC8641HPCN.h
include/configs/sbc8641d.h

index 7e36801741c90561423b32b054516ad90c6ec7b0..60af3dd712835d27934173615efdaca486b55cd8 100644 (file)
@@ -217,8 +217,8 @@ boot_warm:
        /*
         * Calculate absolute address in FLASH and jump there
         *------------------------------------------------------*/
-       lis     r3, CONFIG_SYS_MONITOR_BASE@h
-       ori     r3, r3, CONFIG_SYS_MONITOR_BASE@l
+       lis     r3, CONFIG_SYS_MONITOR_BASE_EARLY@h
+       ori     r3, r3, CONFIG_SYS_MONITOR_BASE_EARLY@l
        addi    r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
        mtlr    r3
        blr
@@ -398,19 +398,19 @@ early_bats:
        isync
 
        /* IBAT 6 */
-       lis     r4, CONFIG_SYS_IBAT6L@h
-       ori     r4, r4, CONFIG_SYS_IBAT6L@l
-       lis     r3, CONFIG_SYS_IBAT6U@h
-       ori     r3, r3, CONFIG_SYS_IBAT6U@l
+       lis     r4, CONFIG_SYS_IBAT6L_EARLY@h
+       ori     r4, r4, CONFIG_SYS_IBAT6L_EARLY@l
+       lis     r3, CONFIG_SYS_IBAT6U_EARLY@h
+       ori     r3, r3, CONFIG_SYS_IBAT6U_EARLY@l
        mtspr   IBAT6L, r4
        mtspr   IBAT6U, r3
        isync
 
        /* DBAT 6 */
-       lis     r4, CONFIG_SYS_DBAT6L@h
-       ori     r4, r4, CONFIG_SYS_DBAT6L@l
-       lis     r3, CONFIG_SYS_DBAT6U@h
-       ori     r3, r3, CONFIG_SYS_DBAT6U@l
+       lis     r4, CONFIG_SYS_DBAT6L_EARLY@h
+       ori     r4, r4, CONFIG_SYS_DBAT6L_EARLY@l
+       lis     r3, CONFIG_SYS_DBAT6U_EARLY@h
+       ori     r3, r3, CONFIG_SYS_DBAT6U_EARLY@l
        mtspr   DBAT6L, r4
        mtspr   DBAT6U, r3
        isync
index 44867633667e56dad1868ea7bd0bbb75130595ed..f2fe4a6cf985f4ac8a275c97e587023f723f6351 100644 (file)
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
 #define CONFIG_SYS_MONITOR_BASE        TEXT_BASE       /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE_EARLY   0xfff00000     /* early monitor loc */
 
 #define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_CFI
 #define CONFIG_SYS_IBAT6L      (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT6U      CONFIG_SYS_DBAT6U
 
+/* Map the last 1M of flash where we're running from reset */
+#define CONFIG_SYS_DBAT6L_EARLY        (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
+                                | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CONFIG_SYS_DBAT6U_EARLY        (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT6L_EARLY        (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
+                                | BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT6U_EARLY        CONFIG_SYS_DBAT6U_EARLY
+
 /*
  * BAT7                4M      Cache-inhibited, guarded
  * 0xe800_0000 4M      PIXIS
index 0a6d5f9ef0c810b85d35ac083800f5138c7b1b6d..4925057b2eb57d13ef45a80ba4d62a6101595288 100644 (file)
@@ -206,7 +206,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #undef CONFIG_SYS_FLASH_CHECKSUM
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE       /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE                TEXT_BASE       /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE_EARLY   0xfff00000     /* early monitor loc */
 
 #define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_CFI
@@ -497,6 +498,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
                                 | BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT6U      CONFIG_SYS_DBAT6U
 
+/* Map the last 1M of flash where we're running from reset */
+#define CONFIG_SYS_DBAT6L_EARLY        (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
+                                | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CONFIG_SYS_DBAT6U_EARLY        (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT6L_EARLY        (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
+                                | BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT6U_EARLY        CONFIG_SYS_DBAT6U_EARLY
+
+/* Leave BAT7 free here - it is used for various things later */
 #define CONFIG_SYS_DBAT7L 0x00000000
 #define CONFIG_SYS_DBAT7U 0x00000000
 #define CONFIG_SYS_IBAT7L 0x00000000
index e8216ea358f288f82b27cc14a7301042dc8b977b..45d81792e06f89533c7e8d87414b4fcbedf93324 100644 (file)
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
 #define CONFIG_SYS_MONITOR_BASE        TEXT_BASE       /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE_EARLY   0xfff00000     /* early monitor loc */
 
 #define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_CFI
 #define CONFIG_SYS_IBAT6L      ((CONFIG_SYS_FLASH_BASE & 0xfe000000) | BATL_PP_RW | BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT6U      CONFIG_SYS_DBAT6U
 
+/* Map the last 1M of flash where we're running from reset */
+#define CONFIG_SYS_DBAT6L_EARLY        (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
+                                | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CONFIG_SYS_DBAT6U_EARLY        (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT6L_EARLY        (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
+                                | BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT6U_EARLY        CONFIG_SYS_DBAT6U_EARLY
+
 #define CONFIG_SYS_DBAT7L      0x00000000
 #define CONFIG_SYS_DBAT7U      0x00000000
 #define CONFIG_SYS_IBAT7L      0x00000000