return;
/* Driver model will probe the devices as they are found */
-#ifndef CONFIG_DM_USB
# ifdef CONFIG_USB_STORAGE
/* try to recognize storage devices immediately */
usb_stor_curr_dev = usb_stor_scan(1);
# endif
+#ifndef CONFIG_DM_USB
# ifdef CONFIG_USB_KEYBOARD
drv_usb_kbd_init();
# endif
return 0;
}
+/**
+ * Get 'data-offset' property from a given image node.
+ *
+ * @fit: pointer to the FIT image header
+ * @noffset: component image node offset
+ * @data_offset: holds the data-offset property
+ *
+ * returns:
+ * 0, on success
+ * -ENOENT if the property could not be found
+ */
+int fit_image_get_data_offset(const void *fit, int noffset, int *data_offset)
+{
+ const fdt32_t *val;
+
+ val = fdt_getprop(fit, noffset, FIT_DATA_OFFSET_PROP, NULL);
+ if (!val)
+ return -ENOENT;
+
+ *data_offset = fdt32_to_cpu(*val);
+
+ return 0;
+}
+
+/**
+ * Get 'data-size' property from a given image node.
+ *
+ * @fit: pointer to the FIT image header
+ * @noffset: component image node offset
+ * @data_size: holds the data-size property
+ *
+ * returns:
+ * 0, on success
+ * -ENOENT if the property could not be found
+ */
+int fit_image_get_data_size(const void *fit, int noffset, int *data_size)
+{
+ const fdt32_t *val;
+
+ val = fdt_getprop(fit, noffset, FIT_DATA_SIZE_PROP, NULL);
+ if (!val)
+ return -ENOENT;
+
+ *data_size = fdt32_to_cpu(*val);
+
+ return 0;
+}
+
/**
* fit_image_hash_get_algo - get hash algorithm name
* @fit: pointer to the FIT format image header
*/
#include <common.h>
-#include <nand.h>
+#include <bmp_layout.h>
#include <errno.h>
-#include <splash.h>
-#include <spi_flash.h>
+#include <fs.h>
+#include <fdt_support.h>
+#include <image.h>
+#include <nand.h>
+#include <sata.h>
#include <spi.h>
+#include <spi_flash.h>
+#include <splash.h>
#include <usb.h>
-#include <sata.h>
-#include <bmp_layout.h>
-#include <fs.h>
DECLARE_GLOBAL_DATA_PTR;
return NULL;
}
+#ifdef CONFIG_FIT
+static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr)
+{
+ int res;
+ int node_offset;
+ int splash_offset;
+ int splash_size;
+ struct image_header *img_header;
+ const u32 *fit_header;
+ u32 fit_size;
+ const size_t header_size = sizeof(struct image_header);
+
+ /* Read in image header */
+ res = splash_storage_read_raw(location, bmp_load_addr, header_size);
+ if (res < 0)
+ return res;
+
+ img_header = (struct image_header *)bmp_load_addr;
+ fit_size = fdt_totalsize(img_header);
+
+ /* Read in entire FIT */
+ fit_header = (const u32 *)(bmp_load_addr + header_size);
+ res = splash_storage_read_raw(location, (u32)fit_header, fit_size);
+ if (res < 0)
+ return res;
+
+ res = fit_check_format(fit_header);
+ if (!res) {
+ debug("Could not find valid FIT image\n");
+ return -EINVAL;
+ }
+
+ node_offset = fit_image_get_node(fit_header, location->name);
+ if (node_offset < 0) {
+ debug("Could not find splash image '%s' in FIT\n",
+ location->name);
+ return -ENOENT;
+ }
+
+ res = fit_image_get_data_offset(fit_header, node_offset,
+ &splash_offset);
+ if (res < 0) {
+ printf("Failed to load splash image (err=%d)\n", res);
+ return res;
+ }
+
+ res = fit_image_get_data_size(fit_header, node_offset, &splash_size);
+ if (res < 0) {
+ printf("Failed to load splash image (err=%d)\n", res);
+ return res;
+ }
+
+ /* Align data offset to 4-byte boundrary */
+ fit_size = fdt_totalsize(fit_header);
+ fit_size = (fit_size + 3) & ~3;
+
+ /* Read in the splash data */
+ location->offset = (location->offset + fit_size + splash_offset);
+ res = splash_storage_read_raw(location, bmp_load_addr , splash_size);
+ if (res < 0)
+ return res;
+
+ return 0;
+}
+#endif /* CONFIG_FIT */
+
/**
* splash_source_load - load splash image from a supported location.
*
if (!splash_location)
return -EINVAL;
- if (splash_location->flags & SPLASH_STORAGE_RAW)
+ if (splash_location->flags == SPLASH_STORAGE_RAW)
return splash_load_raw(splash_location, bmp_load_addr);
- else if (splash_location->flags & SPLASH_STORAGE_FS)
+ else if (splash_location->flags == SPLASH_STORAGE_FS)
return splash_load_fs(splash_location, bmp_load_addr);
-
+#ifdef CONFIG_FIT
+ else if (splash_location->flags == SPLASH_STORAGE_FIT)
+ return splash_load_fit(splash_location, bmp_load_addr);
+#endif
return -EINVAL;
}
usb_max_devs = 0;
}
-#ifndef CONFIG_DM_USB
/*******************************************************************************
* scan the usb and reports device info
* to the user if mode = 1
*/
int usb_stor_scan(int mode)
{
- unsigned char i;
-
if (mode == 1)
printf(" scanning usb for storage devices... ");
+#ifndef CONFIG_DM_USB
+ unsigned char i;
+
usb_disable_asynch(1); /* asynch transfer not allowed */
usb_stor_reset();
} /* for */
usb_disable_asynch(0); /* asynch transfer allowed */
+#endif
printf("%d Storage Device(s) found\n", usb_max_devs);
if (usb_max_devs > 0)
return 0;
return -1;
}
-#endif
static int usb_stor_irq(struct usb_device *dev)
{
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_STORAGE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
common/splash.c. It is called as part of the splash screen display
sequence. It gives the board an opportunity to prepare the splash
image data before it is processed and sent to the frame buffer by
-U-Boot. Define your own version to use this feature.
+U-Boot. Define your own version to use this feature.
CONFIG_SPLASH_SOURCE
- If splashsource is undefined, use the first splash location as default.
- If splashsource is set to an unsupported value, do not load a splash screen.
-A splash source location can describe either storage with raw data, or storage
-formatted with a file system. In case of a filesystem, the splash screen data is
-loaded as a file. The name of the splash screen file can be controlled with the
-environment variable "splashfile".
+A splash source location can describe either storage with raw data, a storage
+formatted with a file system or a FIT image. In case of a filesystem, the splash
+screen data is loaded as a file. The name of the splash screen file can be
+controlled with the environment variable "splashfile".
+
+To enable loading the splash image from a FIT image, CONFIG_FIT must be
+enabled. Struct splash_location field 'name' should match the splash image
+name within the FIT and the FIT should start at the 'offset' field address in
+the specified storage.
"WAIT_FOR_NULL_COMPLETE",
};
-#define DRIVER_DESC "DWC2 HS USB OTG Device Driver, (c) Samsung Electronics"
#define DRIVER_VERSION "15 March 2009"
struct dwc2_udc *the_controller;
static const char driver_name[] = "dwc2-udc";
-static const char driver_desc[] = DRIVER_DESC;
static const char ep0name[] = "ep0-control";
/* Max packet size*/
* can't really use its struct. All we do here is say that we're using
* the submode of "SAFE" which directly matches the CDC Subset.
*/
+#ifdef CONFIG_USB_ETH_SUBSET
static const u8 mdlm_detail_desc[] = {
6,
USB_DT_CS_INTERFACE,
0, /* network control capabilities (none) */
0, /* network data capabilities ("raw" encapsulation) */
};
+#endif
#endif
help
Enables support for the on-chip xHCI controller on Rockchip SoCs.
+config USB_XHCI_ZYNQMP
+ bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
+ depends on ARCH_ZYNQMP
+ help
+ Enables support for the on-chip xHCI controller on Xilinx ZynqMP SoCs.
+
endif # USB_XHCI_HCD
config USB_EHCI_HCD
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/sys_proto.h>
#include <dm.h>
+#include <power/regulator.h>
#include "ehci.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define USB_OTGREGS_OFFSET 0x000
#define USB_H1REGS_OFFSET 0x200
#define USB_H2REGS_OFFSET 0x400
#define ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS 0x00000040
#define USBNC_OFFSET 0x200
+#define USBNC_PHY_STATUS_OFFSET 0x23C
#define USBNC_PHYSTATUS_ID_DIG (1 << 4) /* otg_id status */
#define USBNC_PHYCFG2_ACAENB (1 << 4) /* otg_id detection enable */
#define UCTRL_PWR_POL (1 << 9) /* OTG Polarity of Power Pin */
struct ehci_mx6_priv_data {
struct ehci_ctrl ctrl;
struct usb_ehci *ehci;
+ struct udevice *vbus_supply;
enum usb_init_type init_type;
int portnr;
};
if (ret)
return ret;
- board_ehci_power(priv->portnr, (type == USB_INIT_DEVICE) ? 0 : 1);
+ if (priv->vbus_supply) {
+ ret = regulator_set_enable(priv->vbus_supply,
+ (type == USB_INIT_DEVICE) ?
+ false : true);
+ if (ret) {
+ puts("Error enabling VBUS supply\n");
+ return ret;
+ }
+ }
if (type == USB_INIT_DEVICE)
return 0;
.init_after_reset = mx6_init_after_reset
};
+static int ehci_usb_phy_mode(struct udevice *dev)
+{
+ struct usb_platdata *plat = dev_get_platdata(dev);
+ void *__iomem addr = (void *__iomem)dev_get_addr(dev);
+ void *__iomem phy_ctrl, *__iomem phy_status;
+ const void *blob = gd->fdt_blob;
+ int offset = dev->of_offset, phy_off;
+ u32 val;
+
+ /*
+ * About fsl,usbphy, Refer to
+ * Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt.
+ */
+ if (is_mx6()) {
+ phy_off = fdtdec_lookup_phandle(blob,
+ offset,
+ "fsl,usbphy");
+ if (phy_off < 0)
+ return -EINVAL;
+
+ addr = (void __iomem *)fdtdec_get_addr(blob, phy_off,
+ "reg");
+ if ((fdt_addr_t)addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ phy_ctrl = (void __iomem *)(addr + USBPHY_CTRL);
+ val = readl(phy_ctrl);
+
+ if (val & USBPHY_CTRL_OTG_ID)
+ plat->init_type = USB_INIT_DEVICE;
+ else
+ plat->init_type = USB_INIT_HOST;
+ } else if (is_mx7()) {
+ phy_status = (void __iomem *)(addr +
+ USBNC_PHY_STATUS_OFFSET);
+ val = readl(phy_status);
+
+ if (val & USBNC_PHYSTATUS_ID_DIG)
+ plat->init_type = USB_INIT_DEVICE;
+ else
+ plat->init_type = USB_INIT_HOST;
+ } else {
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
+{
+ struct usb_platdata *plat = dev_get_platdata(dev);
+ const char *mode;
+
+ mode = fdt_getprop(gd->fdt_blob, dev->of_offset, "dr_mode", NULL);
+ if (mode) {
+ if (strcmp(mode, "peripheral") == 0)
+ plat->init_type = USB_INIT_DEVICE;
+ else if (strcmp(mode, "host") == 0)
+ plat->init_type = USB_INIT_HOST;
+ else if (strcmp(mode, "otg") == 0)
+ return ehci_usb_phy_mode(dev);
+ else
+ return -EINVAL;
+
+ return 0;
+ }
+
+ return ehci_usb_phy_mode(dev);
+}
+
static int ehci_usb_probe(struct udevice *dev)
{
struct usb_platdata *plat = dev_get_platdata(dev);
struct usb_ehci *ehci = (struct usb_ehci *)dev_get_addr(dev);
struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
+ enum usb_init_type type = plat->init_type;
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
int ret;
priv->ehci = ehci;
priv->portnr = dev->seq;
- priv->init_type = plat->init_type;
+ priv->init_type = type;
+
+ ret = device_get_supply_regulator(dev, "vbus-supply",
+ &priv->vbus_supply);
+ if (ret)
+ debug("%s: No vbus supply\n", dev->name);
ret = ehci_mx6_common_init(ehci, priv->portnr);
if (ret)
return ret;
- board_ehci_power(priv->portnr, (priv->init_type == USB_INIT_DEVICE) ? 0 : 1);
+ if (priv->vbus_supply) {
+ ret = regulator_set_enable(priv->vbus_supply,
+ (type == USB_INIT_DEVICE) ?
+ false : true);
+ if (ret) {
+ puts("Error enabling VBUS supply\n");
+ return ret;
+ }
+ }
if (priv->init_type == USB_INIT_HOST) {
setbits_le32(&ehci->usbmode, CM_HOST);
.name = "ehci_mx6",
.id = UCLASS_USB,
.of_match = mx6_usb_ids,
+ .ofdata_to_platdata = ehci_usb_ofdata_to_platdata,
.probe = ehci_usb_probe,
.remove = ehci_deregister,
.ops = &ehci_usb_ops,
__maybe_unused int y_off = 0;
__maybe_unused ulong addr;
__maybe_unused char *s;
- __maybe_unused int len, space;
+ __maybe_unused int len, ret, space;
splash_get_pos(&video_logo_xpos, &video_logo_ypos);
#ifdef CONFIG_SPLASH_SCREEN
s = getenv("splashimage");
if (s != NULL) {
- splash_screen_prepare();
+ ret = splash_screen_prepare();
+ if (ret < 0)
+ return video_fb_address;
addr = simple_strtoul(s, NULL, 16);
if (video_display_bitmap(addr,
#define CONFIG_IOMUX_LPSR
+/* USB Configs */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_RTL8152
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#endif
+
#endif /* __CONFIG_H */
#if defined(CONFIG_ZYNQMP_USB)
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
-#define CONFIG_USB_XHCI_ZYNQMP
#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* image node */
#define FIT_DATA_PROP "data"
+#define FIT_DATA_OFFSET_PROP "data-offset"
+#define FIT_DATA_SIZE_PROP "data-size"
#define FIT_TIMESTAMP_PROP "timestamp"
#define FIT_DESC_PROP "description"
#define FIT_ARCH_PROP "arch"
int fit_image_get_entry(const void *fit, int noffset, ulong *entry);
int fit_image_get_data(const void *fit, int noffset,
const void **data, size_t *size);
+int fit_image_get_data_offset(const void *fit, int noffset, int *data_offset);
+int fit_image_get_data_size(const void *fit, int noffset, int *data_size);
int fit_image_hash_get_algo(const void *fit, int noffset, char **algo);
int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value,
};
enum splash_flags {
- SPLASH_STORAGE_RAW,
- SPLASH_STORAGE_FS,
+ SPLASH_STORAGE_RAW, /* Stored in raw memory */
+ SPLASH_STORAGE_FS, /* Stored within a file system */
+ SPLASH_STORAGE_FIT, /* Stored inside a FIT image */
};
struct splash_location {
CONFIG_USB_XHCI_KEYSTONE
CONFIG_USB_XHCI_OMAP
CONFIG_USB_XHCI_PCI
-CONFIG_USB_XHCI_ZYNQMP
CONFIG_USER_LOWLEVEL_INIT
CONFIG_USE_FDT
CONFIG_USE_INTERRUPT
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