]> git.sur5r.net Git - u-boot/commitdiff
ARM: tegra: pinctrl: minor cleanup
authorStephen Warren <swarren@nvidia.com>
Wed, 25 Mar 2015 18:04:35 +0000 (12:04 -0600)
committerTom Warren <twarren@nvidia.com>
Mon, 30 Mar 2015 16:54:06 +0000 (09:54 -0700)
Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable
declaration together with other pin/mux level definitions. Now the whole
file is grouped/ordered pin/mux-related then drvgrp-related definitions.

Fix typo in ifdef comment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/include/asm/arch-tegra/pinmux.h
arch/arm/mach-tegra/pinmux-common.c

index 4212e57699301a92bd29a9370d47a99ae3de5080..e3eb706fcb8fe9c757b9808ca1aa0e82a304e4ac 100644 (file)
@@ -170,6 +170,16 @@ void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io);
 void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
                                int len);
 
+struct pmux_pingrp_desc {
+       u8 funcs[4];
+#if defined(CONFIG_TEGRA20)
+       u8 ctl_id;
+       u8 pull_id;
+#endif /* CONFIG_TEGRA20 */
+};
+
+extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
+
 #ifdef TEGRA_PMX_SOC_HAS_DRVGRPS
 
 #define PMUX_SLWF_MIN  0
@@ -219,14 +229,4 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
 
 #endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
 
-struct pmux_pingrp_desc {
-       u8 funcs[4];
-#if defined(CONFIG_TEGRA20)
-       u8 ctl_id;
-       u8 pull_id;
-#endif /* CONFIG_TEGRA20 */
-};
-
-extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
-
 #endif /* _TEGRA_PINMUX_H_ */
index 912f65e98b06e999ad8101c29dd71e62fff5e229..96dbb5e89b7dfd1ab5477673c78b8090c578ad5f 100644 (file)
@@ -695,4 +695,4 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
        for (i = 0; i < len; i++)
                pinmux_config_drvgrp(&config[i]);
 }
-#endif /* TEGRA_PMX_HAS_DRVGRPS */
+#endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */