]> git.sur5r.net Git - u-boot/commitdiff
ARM: rmobile: Fix CPGW address on V3M Eagle
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Fri, 15 Jun 2018 23:16:50 +0000 (01:16 +0200)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Sat, 16 Jun 2018 02:27:28 +0000 (04:27 +0200)
Fix the CPGWPR/CPGWPCR register address on V3M Eagle to unlock
access to the CPG clock control registers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
board/renesas/eagle/eagle.c

index 4bf0a202e08bd00ffd1cc591ca3d0f64b5ced4ee..7b89c10cc742dde3ea3b13b6e38dd273474b3cf1 100644 (file)
@@ -26,8 +26,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define CPGWPR  0xE6150900
 #define CPGWPCR        0xE6150904
-#define CPGWPR  0xE615090C
 
 /* PLL */
 #define PLL0CR         0xE61500D8
@@ -54,8 +54,9 @@ void s_init(void)
 
 int board_early_init_f(void)
 {
-       writel(0xA5A5FFFF, CPGWPCR);
-       writel(0x5A5A0000, CPGWPR);
+       /* Unlock CPG access */
+       writel(0xA5A5FFFF, CPGWPR);
+       writel(0x5A5A0000, CPGWPCR);
 
        /* TMU0 */
        mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);