Changes for U-Boot 1.1.1:
======================================================================
+* Patches by Pantelis Antoniou, 16 Apr 2004:
+ - add support for a new version of an Intracom board and fix
+ various other things on others.
+ - add verify support to the crc32 command (define
+ CONFIG_CRC32_VERIFY to enable it)
+ - fix FEC driver for MPC8xx systems:
+ 1. fix compilation problems for boards that use dynamic
+ allocation of DPRAM
+ 2. shut down FEC after network transfers
+ - HUSH parser fixes:
+ 1. A new test command was added. This is a simplified version of
+ the one in the bourne shell.
+ 2. A new exit command was added which terminates the current
+ executing script.
+ 3. Fixed handing of $? (exit code of last executed command)
+
* Patch by George G. Davis, 02 Apr 2004:
add support for Intel Assabet board
}
@./mkconfig -a $(call xtract_NETVIA,$@) ppc mpc8xx netvia
+xtract_NETPHONE = $(subst _V2,,$(subst _config,,$1))
+
+NETPHONE_V2_config \
NETPHONE_config: unconfig
- @./mkconfig $(@:_config=) ppc mpc8xx netphone
+ @ >include/config.h
+ @[ -z "$(findstring NETPHONE_config,$@)" ] || \
+ { echo "#define CONFIG_NETPHONE_VERSION 1" >>include/config.h ; \
+ }
+ @[ -z "$(findstring NETPHONE_V2_config,$@)" ] || \
+ { echo "#define CONFIG_NETPHONE_VERSION 2" >>include/config.h ; \
+ }
+ @./mkconfig -a $(call xtract_NETPHONE,$@) ppc mpc8xx netphone
xtract_NETTA = $(subst _ISDN,,$(subst _config,,$1))
CFG_POCMR2_MASK_ATTRIB: (MPC826x only)
Overrides the default PCI memory map in cpu/mpc8260/pci.c if set.
+- CONFIG_ETHER_ON_FEC[12]
+ Define to enable FEC[12] on a 8xx series processor.
+
+- CONFIG_FEC[12]_PHY
+ Define to the hardcoded PHY address which corresponds
+ to the given FEC.
+
+ i.e.
+ #define CONFIG_FEC1_PHY 4
+ means that the PHY with address 4 is connected to FEC1
+
+ When set to -1, means to probe for first available.
+
+- CONFIG_FEC[12]_PHY_NORXERR
+ The PHY does not have a RXERR line (RMII only).
+ (so program the FEC to ignore it).
+
+- CONFIG_RMII
+ Enable RMII mode for all FECs.
+ Note that this is a global option, we can't
+ have one FEC in standard MII mode and another in RMII mode.
+
Building the Software:
======================
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long size;
+#if CONFIG_NETPHONE_VERSION == 2
+ unsigned long size1;
+#endif
int i;
/* Init: no FLASHes known */
flash_info[0].size = size;
+#if CONFIG_NETPHONE_VERSION == 2
+ size1 = flash_get_size((vu_long *) FLASH_BASE4_PRELIM, &flash_info[1]);
+
+ if (flash_info[1].flash_id == FLASH_UNKNOWN && size1 > 0) {
+ printf("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n", size1, size1 << 20);
+ }
+
+ /* Remap FLASH according to real size */
+ memctl->memc_or4 = CFG_OR_TIMING_FLASH | (-size1 & 0xFFFF8000);
+ memctl->memc_br4 = (CFG_FLASH_BASE4 & BR_BA_MSK) | (memctl->memc_br4 & ~(BR_BA_MSK));
+
+ /* Re-do sizing to get full correct info */
+ size1 = flash_get_size((vu_long *) CFG_FLASH_BASE4, &flash_info[1]);
+
+ flash_get_offsets(CFG_FLASH_BASE4, &flash_info[1]);
+
+ size += size1;
+#endif
+
return (size);
}
/*
* (C) Copyright 2000-2004
+ * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
int checkboard(void)
{
- printf ("Intracom NetPhone\n");
+ printf ("Intracom NetPhone V%d\n", CONFIG_NETPHONE_VERSION);
return (0);
}
#define BS_1110 0x0E000000
#define BS_1111 0x0F000000
-#define A10_AAAA 0x00000000
-#define A10_AAA0 0x00200000
-#define A10_AAA1 0x00300000
-#define A10_000A 0x00800000
-#define A10_0000 0x00A00000
-#define A10_0001 0x00B00000
-#define A10_111A 0x00C00000
-#define A10_1110 0x00E00000
-#define A10_1111 0x00F00000
-
-#define RAS_0000 0x00000000
-#define RAS_0001 0x00040000
-#define RAS_1110 0x00080000
-#define RAS_1111 0x000C0000
-
-#define CAS_0000 0x00000000
-#define CAS_0001 0x00010000
-#define CAS_1110 0x00020000
-#define CAS_1111 0x00030000
-
-#define WE_0000 0x00000000
-#define WE_0001 0x00004000
-#define WE_1110 0x00008000
-#define WE_1111 0x0000C000
+#define GPL0_AAAA 0x00000000
+#define GPL0_AAA0 0x00200000
+#define GPL0_AAA1 0x00300000
+#define GPL0_000A 0x00800000
+#define GPL0_0000 0x00A00000
+#define GPL0_0001 0x00B00000
+#define GPL0_111A 0x00C00000
+#define GPL0_1110 0x00E00000
+#define GPL0_1111 0x00F00000
+
+#define GPL1_0000 0x00000000
+#define GPL1_0001 0x00040000
+#define GPL1_1110 0x00080000
+#define GPL1_1111 0x000C0000
+
+#define GPL2_0000 0x00000000
+#define GPL2_0001 0x00010000
+#define GPL2_1110 0x00020000
+#define GPL2_1111 0x00030000
+
+#define GPL3_0000 0x00000000
+#define GPL3_0001 0x00004000
+#define GPL3_1110 0x00008000
+#define GPL3_1111 0x0000C000
#define GPL4_0000 0x00000000
#define GPL4_0001 0x00001000
#define LAST 0x00000001
+#define A10_AAAA GPL0_AAAA
+#define A10_AAA0 GPL0_AAA0
+#define A10_AAA1 GPL0_AAA1
+#define A10_000A GPL0_000A
+#define A10_0000 GPL0_0000
+#define A10_0001 GPL0_0001
+#define A10_111A GPL0_111A
+#define A10_1110 GPL0_1110
+#define A10_1111 GPL0_1111
+
+#define RAS_0000 GPL1_0000
+#define RAS_0001 GPL1_0001
+#define RAS_1110 GPL1_1110
+#define RAS_1111 GPL1_1111
+
+#define CAS_0000 GPL2_0000
+#define CAS_0001 GPL2_0001
+#define CAS_1110 GPL2_1110
+#define CAS_1111 GPL2_1111
+
+#define WE_0000 GPL3_0000
+#define WE_0001 GPL3_0001
+#define WE_1110 GPL3_1110
+#define WE_1111 GPL3_1111
+
/* #define CAS_LATENCY 3 */
#define CAS_LATENCY 2
CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST,
};
+#if CONFIG_NETPHONE_VERSION == 2
+static const uint nandcs_table[0x40] = {
+ /* RSS */
+ CS_1000 | GPL4_1111 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_1110 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_0000 | GPL5_1111,
+ CS_0000 | GPL4_0001 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
+ CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, /* NOP */
+
+ /* RBS */
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+ /* WSS */
+ CS_1000 | GPL4_1111 | GPL5_1110 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_0001 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_1111,
+ CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST,
+
+ /* WBS */
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+ /* UPT */
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+ /* EXC */
+ CS_0001 | LAST,
+ _NOT_USED_,
+
+ /* REG */
+ CS_1110 ,
+ CS_0001 | LAST,
+};
+#endif
+
/* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */
/* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */
#define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU)
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size;
- upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(uint));
+ upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(sdram_table[0]));
/*
* Preliminary prescaler for refresh
size = get_ram_size((long *)0, SDRAM_MAX_SIZE);
-#if 0
- printf("check 0\n");
- check_ram(( 0 << 20), (2 << 20));
- printf("check 16\n");
- check_ram((16 << 20), (2 << 20));
- printf("check 32\n");
- check_ram((32 << 20), (2 << 20));
- printf("check 48\n");
- check_ram((48 << 20), (2 << 20));
-#endif
-
if (size == 0) {
printf("SIZE is zero: LOOP on 0\n");
for (;;) {
#define PB_GP_OUTVAL (_B(26) | _B(27) | _B(29) | _B(30))
#define PB_SP_DIRVAL 0
+#if CONFIG_NETPHONE_VERSION == 1
#define PC_GP_INMASK _BW(12)
#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(13) | _BW(15))
+#elif CONFIG_NETPHONE_VERSION == 2
+#define PC_GP_INMASK (_BW(13) | _BW(15))
+#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(12))
+#endif
#define PC_SP_MASK 0
#define PC_SOVAL 0
#define PC_INTVAL 0
#define PC_GP_OUTVAL (_BW(10) | _BW(11))
#define PC_SP_DIRVAL 0
+#if CONFIG_NETPHONE_VERSION == 1
#define PE_GP_INMASK _B(31)
#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27) | _B(28) | _B(29) | _B(30))
+#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28))
+#elif CONFIG_NETPHONE_VERSION == 2
+#define PE_GP_INMASK _BR(28, 31)
+#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27))
+#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27))
+#endif
#define PE_SP_MASK 0
#define PE_ODR_VAL 0
-#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28))
#define PE_SP_DIRVAL 0
int board_early_init_f(void)
volatile memctl8xx_t *memctl = &immap->im_memctl;
/* NAND chip select */
+#if CONFIG_NETPHONE_VERSION == 1
memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_8_CLK | OR_EHTR | OR_TRLX);
memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
+#elif CONFIG_NETPHONE_VERSION == 2
+ upmconfig(UPMA, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0]));
+ memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS);
+ memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMA);
+ memctl->memc_mamr = 0; /* all clear */
+#endif
/* DSP chip select */
memctl->memc_or2 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_ACS_DIV2 | OR_SETA | OR_TRLX);
memctl->memc_br2 = ((DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_V);
- /* External register chip select */
- memctl->memc_or4 = ((0xFFFFFFFFLU & ~(ER_SIZE - 1)) | OR_BI | OR_SCY_4_CLK);
- memctl->memc_br4 = ((ER_BASE & BR_BA_MSK) | BR_PS_32 | BR_V);
-
+#if CONFIG_NETPHONE_VERSION == 1
+ memctl->memc_br4 &= ~BR_V;
+#endif
memctl->memc_br5 &= ~BR_V;
memctl->memc_br6 &= ~BR_V;
memctl->memc_br7 &= ~BR_V;
{
int i;
+#if CONFIG_NETPHONE_VERSION == 2
+ /* assert peripheral reset */
+ ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat &= ~_BW(12);
+ for (i = 0; i < 10; i++)
+ udelay(1000);
+ ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat |= _BW(12);
+#endif
reset_phys();
/* check in order to enable the local console */
#define KP_FORCE_DELAY_HZ (CFG_HZ/2) /* key was force pressed */
#define KP_IDLE_DELAY_HZ (CFG_HZ/2) /* key was released and idle */
+#if CONFIG_NETPHONE_VERSION == 1
#define KP_SPI_RXD_PORT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat)
#define KP_SPI_RXD_MASK 0x0008
#define KP_SPI_CLK_PORT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat)
#define KP_SPI_CLK_MASK 0x0001
+#elif CONFIG_NETPHONE_VERSION == 2
+#define KP_SPI_RXD_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat)
+#define KP_SPI_RXD_MASK 0x00000008
+
+#define KP_SPI_TXD_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat)
+#define KP_SPI_TXD_MASK 0x00000004
+
+#define KP_SPI_CLK_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat)
+#define KP_SPI_CLK_MASK 0x00000002
+#endif
#define KP_CS_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat)
#define KP_CS_MASK 0x00000010
val = 0x80 | (row_mask & 0x7F);
(void)kp_data_transfer(val);
+#if CONFIG_NETPHONE_VERSION == 1
col_mask = kp_data_transfer(val) & 0x0F;
+#elif CONFIG_NETPHONE_VERSION == 2
+ col_mask = ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat & 0x0f;
+ /* XXX FUCK FUCK FUCK FUCK FUCK!!!! */
+ col_mask = ((col_mask & 0x08) >> 3) | /* BKBR1 */
+ ((col_mask & 0x04) << 1) | /* BKBR2 */
+ (col_mask & 0x02) | /* BKBR3 */
+ ((col_mask & 0x01) << 2); /* BKBR4 */
+#endif
/* printf("col_mask(row_mask = 0x%x) -> col_mask = 0x%x\n", row_mask, col_mask); */
+
return col_mask;
}
return 0;
}
+#ifndef CONFIG_CRC32_VERIFY
+
int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
ulong addr, length;
return 0;
}
+#else /* CONFIG_CRC32_VERIFY */
+
+int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ ulong addr, length;
+ ulong crc;
+ ulong *ptr;
+ ulong vcrc;
+ int verify;
+ int ac;
+ char **av;
+
+ if (argc < 3) {
+ usage:
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ av = argv + 1;
+ ac = argc - 1;
+ if (strcmp(*av, "-v") == 0) {
+ verify = 1;
+ av++;
+ ac--;
+ if (ac < 3)
+ goto usage;
+ } else
+ verify = 0;
+
+ addr = simple_strtoul(*av++, NULL, 16);
+ addr += base_address;
+ length = simple_strtoul(*av++, NULL, 16);
+
+ crc = crc32(0, (const uchar *) addr, length);
+
+ if (!verify) {
+ printf ("CRC32 for %08lx ... %08lx ==> %08lx\n",
+ addr, addr + length - 1, crc);
+ if (ac > 2) {
+ ptr = (ulong *) simple_strtoul (*av++, NULL, 16);
+ *ptr = crc;
+ }
+ } else {
+ vcrc = simple_strtoul(*av++, NULL, 16);
+ if (vcrc != crc) {
+ printf ("CRC32 for %08lx ... %08lx ==> %08lx != %08lx ** ERROR **\n",
+ addr, addr + length - 1, crc, vcrc);
+ return 1;
+ }
+ }
+
+ return 0;
+
+}
+#endif /* CONFIG_CRC32_VERIFY */
+
/**************************************************/
#if (CONFIG_COMMANDS & CFG_CMD_MEMORY)
U_BOOT_CMD(
"[.b, .w, .l] addr1 addr2 count\n - compare memory\n"
);
+#ifndef CONFIG_CRC32_VERIFY
+
U_BOOT_CMD(
crc32, 4, 1, do_mem_crc,
"crc32 - checksum calculation\n",
"address count [addr]\n - compute CRC32 checksum [save at addr]\n"
);
+#else /* CONFIG_CRC32_VERIFY */
+
+U_BOOT_CMD(
+ crc32, 5, 1, do_mem_crc,
+ "crc32 - checksum calculation\n",
+ "address count [addr]\n - compute CRC32 checksum [save at addr]\n"
+ "-v address count crc\n - verify crc of memory area\n"
+);
+
+#endif /* CONFIG_CRC32_VERIFY */
+
U_BOOT_CMD(
base, 2, 1, do_mem_base,
"base - print or set address offset\n",
return (rc);
}
-#endif / CONFIG_PXA_PCMCIA */
+#endif /* CONFIG_PXA_PCMCIA */
#endif /* CONFIG_I82365 */
" - echo args to console; \\c suppresses newline\n"
);
+#ifdef CFG_HUSH_PARSER
+
+int
+do_test (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ char **ap;
+ int left, adv, expr, last_expr, neg, last_cmp;
+
+ /* args? */
+ if (argc < 3)
+ return 1;
+
+#if 0
+ {
+ printf("test:");
+ left = 1;
+ while (argv[left])
+ printf(" %s", argv[left++]);
+ }
+#endif
+
+ last_expr = 0;
+ left = argc - 1; ap = argv + 1;
+ if (left > 0 && strcmp(ap[0], "!") == 0) {
+ neg = 1;
+ ap++;
+ left--;
+ } else
+ neg = 0;
+
+ expr = -1;
+ last_cmp = -1;
+ last_expr = -1;
+ while (left > 0) {
+
+ if (strcmp(ap[0], "-o") == 0 || strcmp(ap[0], "-a") == 0)
+ adv = 1;
+ else if (strcmp(ap[0], "-z") == 0 || strcmp(ap[0], "-n") == 0)
+ adv = 2;
+ else
+ adv = 3;
+
+ if (left < adv) {
+ expr = 1;
+ break;
+ }
+
+ if (adv == 1) {
+ if (strcmp(ap[0], "-o") == 0) {
+ last_expr = expr;
+ last_cmp = 0;
+ } else if (strcmp(ap[0], "-a") == 0) {
+ last_expr = expr;
+ last_cmp = 1;
+ } else {
+ expr = 1;
+ break;
+ }
+ }
+
+ if (adv == 2) {
+ if (strcmp(ap[0], "-z") == 0)
+ expr = strlen(ap[1]) == 0 ? 0 : 1;
+ else if (strcmp(ap[0], "-n") == 0)
+ expr = strlen(ap[1]) == 0 ? 1 : 0;
+ else {
+ expr = 1;
+ break;
+ }
+
+ if (last_cmp == 0)
+ expr = last_expr || expr;
+ else if (last_cmp == 1)
+ expr = last_expr && expr;
+ last_cmp = -1;
+ }
+
+ if (adv == 3) {
+ if (strcmp(ap[1], "=") == 0)
+ expr = strcmp(ap[0], ap[2]) == 0;
+ else if (strcmp(ap[1], "!=") == 0)
+ expr = strcmp(ap[0], ap[2]) != 0;
+ else if (strcmp(ap[1], ">") == 0)
+ expr = strcmp(ap[0], ap[2]) > 0;
+ else if (strcmp(ap[1], "<") == 0)
+ expr = strcmp(ap[0], ap[2]) < 0;
+ else if (strcmp(ap[1], "-eq") == 0)
+ expr = simple_strtol(ap[0], NULL, 10) == simple_strtol(ap[2], NULL, 10);
+ else if (strcmp(ap[1], "-ne") == 0)
+ expr = simple_strtol(ap[0], NULL, 10) != simple_strtol(ap[2], NULL, 10);
+ else if (strcmp(ap[1], "-lt") == 0)
+ expr = simple_strtol(ap[0], NULL, 10) < simple_strtol(ap[2], NULL, 10);
+ else if (strcmp(ap[1], "-le") == 0)
+ expr = simple_strtol(ap[0], NULL, 10) <= simple_strtol(ap[2], NULL, 10);
+ else if (strcmp(ap[1], "-gt") == 0)
+ expr = simple_strtol(ap[0], NULL, 10) > simple_strtol(ap[2], NULL, 10);
+ else if (strcmp(ap[1], "-ge") == 0)
+ expr = simple_strtol(ap[0], NULL, 10) >= simple_strtol(ap[2], NULL, 10);
+ else {
+ expr = 1;
+ break;
+ }
+
+ if (last_cmp == 0)
+ expr = last_expr || expr;
+ else if (last_cmp == 1)
+ expr = last_expr && expr;
+ last_cmp = -1;
+ }
+
+ ap += adv; left -= adv;
+ }
+
+ if (neg)
+ expr = !expr;
+
+ expr = !expr;
+
+#if 0
+ printf(": returns %d\n", expr);
+#endif
+
+ return expr;
+}
+
+U_BOOT_CMD(
+ test, CFG_MAXARGS, 1, do_test,
+ "test - minimal test like /bin/sh\n",
+ "[args..]\n"
+ " - test functionality\n"
+);
+
+int
+do_exit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int r;
+
+ r = 0;
+ if (argc > 1)
+ r = simple_strtoul(argv[1], NULL, 10);
+
+ return -r - 2;
+}
+
+U_BOOT_CMD(
+ exit, 2, 1, do_exit,
+ "exit - exit script\n",
+ " - exit functionality\n"
+);
+
+
+#endif
+
/*
* Use puts() instead of printf() to avoid printf buffer overflow
* for long help messages
unsigned int global_argc;
#endif
unsigned int last_return_code;
+int nesting_level;
#ifndef __U_BOOT__
extern char **environ; /* This is in <unistd.h>, but protected with __USE_GNU */
#endif
static int b_addchr(o_string *o, int ch);
static void b_reset(o_string *o);
static int b_addqchr(o_string *o, int ch, int quote);
+#ifndef __U_BOOT__
static int b_adduint(o_string *o, unsigned int i);
+#endif
/* in_str manipulations: */
static int static_get(struct in_str *i);
static int static_peek(struct in_str *i);
return p + 1;
}
+#ifndef __U_BOOT__
static int b_adduint(o_string *o, unsigned int i)
{
int r;
do r=b_addchr(o, *p++); while (r==0 && *p);
return r;
}
+#endif
static int static_get(struct in_str *i)
{
}
last_return_code=rcode;
#else
+ if (rcode < -1) {
+ last_return_code = -rcode - 2;
+ return -2; /* exit */
+ }
last_return_code=(rcode == 0) ? 0 : 1;
#endif
#ifndef __U_BOOT__
}
#endif
+#ifdef __U_BOOT__
+static char *get_dollar_var(char ch);
+#endif
+
/* This is used to get/check local shell variables */
static char *get_local_var(const char *s)
{
if (!s)
return NULL;
+
+#ifdef __U_BOOT__
+ if (*s == '$')
+ return get_dollar_var(s[1]);
+#endif
+
for (cur = top_vars; cur; cur=cur->next)
if(strcmp(cur->name, s)==0)
return cur->value;
int result=0;
struct variables *cur;
+#ifdef __U_BOOT__
+ /* might be possible! */
+ if (!isalpha(*s))
+ return -1;
+#endif
+
name=strdup(s);
#ifdef __U_BOOT__
if (getenv(name) != NULL) {
printf ("ERROR: "
"There is a global environment variable with the same name.\n");
+ free(name);
return -1;
}
#endif
static int is_assignment(const char *s)
{
- if (s==NULL || !isalpha(*s)) return 0;
+ if (s == NULL)
+ return 0;
+
+ if (!isalpha(*s)) return 0;
++s;
while(isalnum(*s) || *s=='_') ++s;
return *s=='=';
* see the bash man page under "Parameter Expansion" */
static char *lookup_param(char *src)
{
- char *p=NULL;
- if (src) {
+ char *p;
+
+ if (!src)
+ return NULL;
+
p = getenv(src);
if (!p)
p = get_local_var(src);
- }
+
return p;
}
+#ifdef __U_BOOT__
+static char *get_dollar_var(char ch)
+{
+ static char buf[40];
+
+ buf[0] = '\0';
+ switch (ch) {
+ case '?':
+ sprintf(buf, "%u", (unsigned int)last_return_code);
+ break;
+ default:
+ return NULL;
+ }
+ return buf;
+}
+#endif
+
/* return code: 0 for OK, 1 for syntax error */
static int handle_dollar(o_string *dest, struct p_context *ctx, struct in_str *input)
{
break;
#endif
case '?':
+#ifndef __U_BOOT__
b_adduint(dest,last_return_code);
+#else
+ ctx->child->sp++;
+ b_addchr(dest, SPECIAL_VAR_SYMBOL);
+ b_addchr(dest, '$');
+ b_addchr(dest, '?');
+ b_addchr(dest, SPECIAL_VAR_SYMBOL);
+#endif
advance = 1;
break;
#ifndef __U_BOOT__
if (input->__promptme == 0) return 1;
#endif
next = (ch == '\n') ? 0 : b_peek(input);
- debug_printf("parse_stream: ch=%c (%d) m=%d quote=%d\n",
- ch,ch,m,dest->quote);
+
+ debug_printf("parse_stream: ch=%c (%d) m=%d quote=%d - %c\n",
+ ch >= ' ' ? ch : '.', ch, m,
+ dest->quote, ctx->stack == NULL ? '*' : '.');
+
if (m==0 || ((m==1 || m==2) && dest->quote)) {
b_addqchr(dest, ch, dest->quote);
} else {
#ifndef __U_BOOT__
run_list(ctx.list_head);
#else
- if (((code = run_list(ctx.list_head)) == -1))
+ code = run_list(ctx.list_head);
+ if (code == -2) { /* exit */
+ b_free(&temp);
+ code = 0;
+ /* XXX hackish way to not allow exit from main loop */
+ if (inp->peek == file_peek) {
+ printf("exit not allowed from main input shell.\n");
+ continue;
+ }
+ break;
+ }
+ if (code == -1)
flag_repeat = 0;
#endif
} else {
{
int ether_index;
int fecp_offset;
- int bd_offset;
int phy_addr;
int actual_phy_addr;
+ int initialized;
}
ether_fcc_info[] = {
#if defined(CONFIG_ETHER_ON_FEC1)
{
0,
offsetof(immap_t, im_cpm.cp_fec1),
- CPM_FEC_BASE,
#if defined(CONFIG_FEC1_PHY)
CONFIG_FEC1_PHY,
#else
-1, /* discover */
#endif
-1,
+ 0,
},
#endif
{
1,
offsetof(immap_t, im_cpm.cp_fec2),
- CPM_FEC_BASE + 0x50,
#if defined(CONFIG_FEC2_PHY)
CONFIG_FEC2_PHY,
#else
-1,
#endif
-1,
+ 0,
},
#endif
};
*/
fecp->fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
+#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE)
+ /* our PHYs are the limit at 2.5 MHz */
+ fecp->fec_mii_speed <<= 1;
+#endif
+
#if defined(CONFIG_DUET) && defined(WANT_MII)
/* use MDC for MII */
immr->im_ioport.iop_pdpar |= 0x0080;
efis->actual_phy_addr = efis->phy_addr;
}
#if defined(CONFIG_MII) && defined(CONFIG_RMII)
+
+ /* the MII interface is connected to FEC1
+ so for the miiphy_xxx function to work we must
+ call mii_init since fec_halt messes the thing up */
+
+ if (efis->ether_index != 0)
+ mii_init();
+
/*
* adapt the RMII speed to the speed of the phy
*/
/* And last, try to fill Rx Buffer Descriptors */
fecp->fec_r_des_active = 0x01000000; /* Descriptor polling active */
+ efis->initialized = 1;
+
return 1;
}
static void fec_halt(struct eth_device* dev)
{
-#if 0
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-}
+ struct ether_fcc_info_s *efis = dev->priv;
+ volatile fec_t *fecp = (volatile fec_t *)(CFG_IMMR + efis->fecp_offset);
+ int i;
-#if 0
-void restart(void)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+ /* avoid halt if initialized; mii gets stuck otherwise */
+ if (!efis->initialized)
+ return;
+
+ /* Whack a reset.
+ * A delay is required between a reset of the FEC block and
+ * initialization of other FEC registers because the reset takes
+ * some time to complete. If you don't delay, subsequent writes
+ * to FEC registers might get killed by the reset routine which is
+ * still in progress.
+ */
+
+ fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET;
+ for (i = 0;
+ (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
+ ++i) {
+ udelay (1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf ("FEC_RESET_DELAY timeout\n");
+ return;
+ }
+
+ efis->initialized = 0;
}
-#endif
#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
{
uint mii_reply;
volatile fec_t *ep;
+ int cnt;
ep = &(((immap_t *)CFG_IMMR)->im_cpm.cp_fec);
ep->fec_mii_data = mii_cmd; /* command to phy */
/* wait for mii complete */
- while (!(ep->fec_ievent & FEC_ENET_MII))
- ; /* spin until done */
+ cnt = 0;
+ while (!(ep->fec_ievent & FEC_ENET_MII)) {
+ if (++cnt > 1000) {
+ printf("mii_send STUCK!\n");
+ break;
+ }
+ }
mii_reply = ep->fec_mii_data; /* result from phy */
ep->fec_ievent = FEC_ENET_MII; /* clear MII complete */
#if 0
#if (defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)) && !defined(CONFIG_BITBANGMII)
-static int mii_init_done = 0;
-
/****************************************************************************
* mii_init -- Initialize the MII for MII command without ethernet
* This function is a subset of eth_init
volatile fec_t *fecp = &(immr->im_cpm.cp_fec);
int i, j;
- if (mii_init_done != 0) {
- return;
- }
-
for (j = 0; j < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); j++) {
/* Whack a reset.
*/
fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN;
}
-
- mii_init_done = 1;
}
/*****************************************************************************
#ifndef __CONFIG_H
#define __CONFIG_H
+#if !defined(CONFIG_NETPHONE_VERSION) || CONFIG_NETPHONE_VERSION > 2
+#error Unsupported CONFIG_NETPHONE version
+#endif
+
/*
* High Level Configuration Options
* (easy to change)
/* #define CONFIG_XIN 10000000 */
#define CONFIG_XIN 50000000
#define MPC8XX_HZ 120000000
+/* #define MPC8XX_HZ 66666666 */
#define CONFIG_8xx_GCLK_FREQ MPC8XX_HZ
#endif
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+#if CONFIG_NETPHONE_VERSION == 2
+#define CFG_FLASH_BASE4 0x40080000
+#endif
+
+#define CFG_RESET_ADDRESS 0x80000000
/*
* For booting Linux, the board info and command line data
/*-----------------------------------------------------------------------
* FLASH organization
*/
+#if CONFIG_NETPHONE_VERSION == 1
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#elif CONFIG_NETPHONE_VERSION == 2
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#endif
#define CFG_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_PLPRCR ((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
(0 << PLPRCR_S_SHIFT) | (6 << PLPRCR_MFI_SHIFT) | (2 << PLPRCR_PDF_SHIFT) | \
PLPRCR_TEXPS)
+#elif MPC8XX_HZ == 66666666
+#define CFG_PLPRCR ((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
+ (1 << PLPRCR_S_SHIFT) | (8 << PLPRCR_MFI_SHIFT) | (2 << PLPRCR_PDF_SHIFT) | \
+ PLPRCR_TEXPS)
#else
#error unsupported CPU freq for XIN = 50MHz
#endif
#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V )
+#if CONFIG_NETPHONE_VERSION == 2
+
+#define FLASH_BASE4_PRELIM 0x40080000 /* FLASH bank #1 */
+
+#define CFG_OR4_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_OR4_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_BR4_PRELIM ((FLASH_BASE4_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V )
+
+#endif
+
/*
* BR3 and OR3 (SDRAM)
*
#define DSP_SIZE 0x00010000 /* 64K */
#define NAND_SIZE 0x00010000 /* 64K */
-#define ER_SIZE 0x00010000 /* 64K */
#define DSP_BASE 0xF1000000
#define NAND_BASE 0xF1010000
-#define ER_BASE 0xF1020000
/****************************************************************/
(((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \
} while(0)
+#if CONFIG_NETPHONE_VERSION == 1
#define NAND_WAIT_READY(nand) \
do { \
+ int _tries = 0; \
while ((((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \
- ; \
+ if (++_tries > 100000) \
+ break; \
+ } while (0)
+#elif CONFIG_NETPHONE_VERSION == 2
+#define NAND_WAIT_READY(nand) \
+ do { \
+ int _tries = 0; \
+ while ((((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \
+ if (++_tries > 100000) \
+ break; \
} while (0)
+#endif
#define WRITE_NAND_COMMAND(d, adr) \
do { \
/*****************************************************************************/
+#if CONFIG_NETPHONE_VERSION == 1
#define STATUS_LED_BIT 0x00000008 /* bit 28 */
+#elif CONFIG_NETPHONE_VERSION == 2
+#define STATUS_LED_BIT 0x00000080 /* bit 24 */
+#endif
+
#define STATUS_LED_PERIOD (CFG_HZ / 2)
#define STATUS_LED_STATE STATUS_LED_BLINKING
/***********************************************************************************************************
+ ----------------------------------------------------------------------------------------------
+
+ (V1) version 1 of the board
+ (V2) version 2 of the board
+
+ ----------------------------------------------------------------------------------------------
+
Pin definitions:
+------+----------------+--------+------------------------------------------------------------
| PB30 | SPI_CLK | Output | SPI Clock
| PC10 | DISPA0 | Output | Display A0
| PC11 | BACKLIGHT | Output | Display backlit
- | PC12 | SPI2RXD | Input | 2nd SPI RXD
- | PC13 | SPI2TXD | Output | 2nd SPI TXD
- | PC15 | SPI2CLK | Output | 2nd SPI CLK
+ | PC12 | SPI2RXD | Input | (V1) 2nd SPI RXD
+ | | IO_RESET | Output | (V2) General I/O reset
+ | PC13 | SPI2TXD | Output | (V1) 2nd SPI TXD (V1)
+ | | HOOK | Input | (V2) Hook input interrupt
+ | PC15 | SPI2CLK | Output | (V1) 2nd SPI CLK
+ | | F_RY_BY | Input | (V2) NAND F_RY_BY
| PE17 | F_ALE | Output | NAND F_ALE
| PE18 | F_CLE | Output | NAND F_CLE
| PE20 | F_CE | Output | NAND F_CE
- | PE24 | SPICS_SCOUT | Output | Codec chip select
+ | PE24 | SPICS_SCOUT | Output | (V1) Codec chip select
+ | | LED | Output | (V2) LED
| PE27 | SPICS_ER | Output | External serial register CS
- | PE28 | LEDIO1 | Output | LED
- | PE29 | LEDIO2 | Output | LED hook for A (TA2)
- | PE30 | LEDIO3 | Output | LED hook for A (TA2)
- | PE31 | F_RY_BY | Input | NAND F_RY_BY
+ | PE28 | LEDIO1 | Output | (V1) LED
+ | | BKBR1 | Input | (V2) Keyboard input scan
+ | PE29 | LEDIO2 | Output | (V1) LED hook for A (TA2)
+ | | BKBR2 | Input | (V2) Keyboard input scan
+ | PE30 | LEDIO3 | Output | (V1) LED hook for A (TA2)
+ | | BKBR3 | Input | (V2) Keyboard input scan
+ | PE31 | F_RY_BY | Input | (V1) NAND F_RY_BY
+ | | BKBR4 | Input | (V2) Keyboard input scan
+------+----------------+--------+---------------------------------------------------
+ ----------------------------------------------------------------------------------------------
+
+ Serial register input:
+
+ +------+----------------+------------------------------------------------------------
+ | # | Name | Comment
+ +------+----------------+------------------------------------------------------------
+ | 0 | BKBR1 | (V1) Keyboard input scan
+ | 1 | BKBR3 | (V1) Keyboard input scan
+ | 2 | BKBR4 | (V1) Keyboard input scan
+ | 3 | BKBR2 | (V1) Keyboard input scan
+ | 4 | HOOK | (V1) Hook switch
+ | 5 | BT_LINK | (V1) Bluetooth link status
+ | 6 | HOST_WAKE | (V1) Bluetooth host wake up
+ | 7 | OK_ETH | (V1) Cisco inline power OK status
+ +------+----------------+------------------------------------------------------------
+
+ ----------------------------------------------------------------------------------------------
+
+ Serial register output:
+
+ +------+----------------+------------------------------------------------------------
+ | # | Name | Comment
+ +------+----------------+------------------------------------------------------------
+ | 0 | KEY1 | Keyboard output scan
+ | 1 | KEY2 | Keyboard output scan
+ | 2 | KEY3 | Keyboard output scan
+ | 3 | KEY4 | Keyboard output scan
+ | 4 | KEY5 | Keyboard output scan
+ | 5 | KEY6 | Keyboard output scan
+ | 6 | KEY7 | Keyboard output scan
+ | 7 | BT_WAKE | Bluetooth wake up
+ +------+----------------+------------------------------------------------------------
+
+ ----------------------------------------------------------------------------------------------
+
Chip selects:
+------+----------------+------------------------------------------------------------
| CS1 | CS_FLASH | NAND flash
| CS2 | CS_DSP | DSP
| CS3 | DCS_DRAM | DRAM
+ | CS4 | CS_FLASH2 | (V2) 2nd flash
+------+----------------+------------------------------------------------------------
+ ----------------------------------------------------------------------------------------------
+
Interrupts:
+------+----------------+------------------------------------------------------------
| IRQ7 | IRQ_MAX | MAX 3100 interrupt
+------+----------------+------------------------------------------------------------
+ ----------------------------------------------------------------------------------------------
+
Interrupts on PCMCIA pins:
+------+----------------+------------------------------------------------------------
| IP_A1| PHY2_LINK | Link status changed for #2 Ethernet interface
| IP_A2| RMII1_MDINT | PHY interrupt for #1
| IP_A3| RMII2_MDINT | PHY interrupt for #2
+ | IP_A5| HOST_WAKE | (V2) Bluetooth host wake
+ | IP_A6| OK_ETH | (V2) Cisco inline power OK
+------+----------------+------------------------------------------------------------
*************************************************************************************************/
/*************************************************************************************************/
+#define CONFIG_CRC32_VERIFY 1
+
+/*************************************************************************************************/
+
+#define CONFIG_HUSH_OLD_PARSER_COMPATIBLE 1
+
+/*************************************************************************************************/
#endif /* __CONFIG_H */
CFG_CMD_MII | \
CFG_CMD_PCMCIA | CFG_CMD_IDE | CFG_CMD_FAT | \
CFG_CMD_DIAG | \
+ CFG_CMD_NFS | \
CFG_CMD_CDP \
)
/*************************************************************************************************/
+#define CONFIG_CRC32_VERIFY 1
+
+/*************************************************************************************************/
+
+#define CONFIG_HUSH_OLD_PARSER_COMPATIBLE 1
+
+/*************************************************************************************************/
+
#endif /* __CONFIG_H */
projects / u-boot / commitdiff