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+ <project id="RTOSDemo_A53.xilinx.gnu.arm.a53.exe.2114664755" name="Xilinx ARM v8 Executable" projectType="xilinx.gnu.arm.a53.exe"/>\r
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<?xml version="1.0" encoding="UTF-8"?>\r
<projectDescription>\r
<name>RTOSDemo_A53</name>\r
- <comment>Created by SDK v2016.1. RTOSDemo_A53_bsp - psu_cortexa53_0</comment>\r
+ <comment>Created by SDK v2018.1. RTOSDemo_A53_bsp - psu_cortexa53_0</comment>\r
<projects>\r
<project>RTOSDemo_A53_bsp</project>\r
</projects>\r
<link>\r
<name>src/FreeRTOS_Source</name>\r
<type>2</type>\r
- <locationURI>FREERTOS_ROOT/FreeRTOS/Source</locationURI>\r
+ <locationURI>FREERTOS_ROOT/Source</locationURI>\r
</link>\r
<link>\r
<name>src/Full_Demo/Standard_Demo_Tasks</name>\r
<type>2</type>\r
- <locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/Minimal</locationURI>\r
+ <locationURI>virtual:/virtual</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/FreeRTOS_Source/portable/MemMang</name>\r
+ <type>2</type>\r
+ <locationURI>FREERTOS_ROOT/Source/portable/MemMang</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/AbortDelay.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/AbortDelay.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/EventGroupsDemo.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/EventGroupsDemo.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/GenQTest.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/GenQTest.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/IntQueue.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/IntQueue.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/IntSemTest.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/IntSemTest.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/QueueOverwrite.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/QueueOverwrite.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/StaticAllocation.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/StaticAllocation.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/TaskNotify.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/TaskNotify.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/TimerDemo.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/TimerDemo.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/blocktim.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/blocktim.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/countsem.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/countsem.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/dynamic.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/dynamic.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/flop.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/flop.c</locationURI>\r
</link>\r
<link>\r
<name>src/Full_Demo/Standard_Demo_Tasks/include</name>\r
<type>2</type>\r
- <locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/include</locationURI>\r
+ <locationURI>FREERTOS_ROOT/Demo/Common/include</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/recmutex.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/recmutex.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>src/Full_Demo/Standard_Demo_Tasks/semtest.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-2-PROJECT_LOC/Common/Minimal/semtest.c</locationURI>\r
</link>\r
</linkedResources>\r
<filteredResources>\r
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- </matcher>\r
- </filter>\r
- <filter>\r
- <id>1461847221751</id>\r
+ <id>1525371948640</id>\r
<name>src/FreeRTOS_Source/portable</name>\r
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<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
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- <filter>\r
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- <filter>\r
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- <arguments>1.0-name-matches-false-false-TimerDemo.c</arguments>\r
- </matcher>\r
- </filter>\r
- <filter>\r
- <id>1461847264041</id>\r
+ <id>1525371973682</id>\r
<name>src/FreeRTOS_Source/portable/GCC</name>\r
<type>9</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1461847244679</id>\r
+ <id>1525374723054</id>\r
<name>src/FreeRTOS_Source/portable/MemMang</name>\r
<type>5</type>\r
<matcher>\r
<variableList>\r
<variable>\r
<name>FREERTOS_ROOT</name>\r
- <value>$%7BPARENT-4-PROJECT_LOC%7D</value>\r
+ <value>$%7BPARENT-3-PROJECT_LOC%7D</value>\r
</variable>\r
</variableList>\r
</projectDescription>\r
+.org 0
+.text
+
+.globl _boot
+.globl _vector_table
.globl _freertos_vector_table
+
.globl FIQInterrupt
.globl IRQInterrupt
.globl SErrorInterrupt
.globl SynchronousInterrupt
+.org 0
+
+.section .vectors, "a"
+
+_vector_table:
+
+.set VBAR, _vector_table
+
+.org VBAR
+ b _boot
+
+.org (VBAR + 0x80)
+ b .
+
+.org (VBAR + 0x100)
+ b .
+
+.org (VBAR + 0x180)
+ b .
+
+
+.org (VBAR + 0x200)
+ b .
+
+.org (VBAR + 0x280)
+ b .
+
+.org (VBAR + 0x300)
+ b .
+
+.org (VBAR + 0x380)
+ b .
+
+
+
+.org (VBAR + 0x400)
+ b .
+
+.org (VBAR + 0x480)
+ b .
+
+.org (VBAR + 0x500)
+ b .
+
+.org (VBAR + 0x580)
+ b .
+
+.org (VBAR + 0x600)
+ b .
+
+.org (VBAR + 0x680)
+ b .
+
+.org (VBAR + 0x700)
+ b .
+
+.org (VBAR + 0x780)
+ b .
+
+
/******************************************************************************
* Vector table to use when FreeRTOS is running.
*****************************************************************************/
-.text
-.section .freertos_vectors
-.align 8
-.set FREERTOS_VBAR, .
+.set FREERTOS_VBAR, (VBAR+0x1000)
+
.org(FREERTOS_VBAR)
_freertos_vector_table:
b FreeRTOS_SWI_Handler
-
+#if 0
SynchronousInterruptHandler:
stp X0,X1, [sp,#-0x10]!
stp X2,X3, [sp,#-0x10]!
ldp X0,X1, [sp], #0x10
eret
+#endif
.end
/* */\r
/* Version: */\r
/* */\r
-/* Copyright (c) 2010 Xilinx, Inc. All rights reserved. */\r
+/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */\r
/* */\r
/* Description : Cortex-A53 Linker Script */\r
/* */\r
\r
MEMORY\r
{\r
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- psu_ddr_0_S_AXI_BASEADDR : ORIGIN = 0x0, LENGTH = 0x80000000\r
- psu_ocm_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFFC0000, LENGTH = 0x30000\r
- psu_ocm_ram_1_S_AXI_BASEADDR : ORIGIN = 0xFFFF0000, LENGTH = 0x10000\r
- psu_ocm_xmpu_cfg_S_AXI_BASEADDR : ORIGIN = 0xFFA70000, LENGTH = 0x10000\r
- psu_pmu_ram_S_AXI_BASEADDR : ORIGIN = 0xFFDC0000, LENGTH = 0x20000\r
- psu_qspi_linear_0_S_AXI_BASEADDR : ORIGIN = 0xC0000000, LENGTH = 0x20000000\r
+ psu_ddr_0_MEM_0 : ORIGIN = 0x0, LENGTH = 0x7FF00000\r
+ psu_ddr_1_MEM_0 : ORIGIN = 0x800000000, LENGTH = 0x80000000\r
+ psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000\r
+ psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000\r
}\r
\r
/* Specify the default entry point to the program */\r
{\r
.text : {\r
KEEP (*(.vectors))\r
- KEEP (*(.freertos_vectors))\r
*(.boot)\r
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+} > psu_ddr_0_MEM_0\r
\r
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KEEP (*(.fini))\r
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+} > psu_ddr_0_MEM_0\r
\r
.interp : {\r
KEEP (*(.interp))\r
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+} > psu_ddr_0_MEM_0\r
\r
.note-ABI-tag : {\r
KEEP (*(.note-ABI-tag))\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
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\r
.rodata : {\r
. = ALIGN(64);\r
*(.rodata.*)\r
*(.gnu.linkonce.r.*)\r
__rodata_end = .;\r
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+} > psu_ddr_0_MEM_0\r
\r
.rodata1 : {\r
. = ALIGN(64);\r
*(.rodata1)\r
*(.rodata1.*)\r
__rodata1_end = .;\r
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+} > psu_ddr_0_MEM_0\r
\r
.sdata2 : {\r
. = ALIGN(64);\r
*(.sdata2.*)\r
*(.gnu.linkonce.s2.*)\r
__sdata2_end = .;\r
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+} > psu_ddr_0_MEM_0\r
\r
.sbss2 : {\r
. = ALIGN(64);\r
*(.sbss2.*)\r
*(.gnu.linkonce.sb2.*)\r
__sbss2_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.data : {\r
. = ALIGN(64);\r
*(.got)\r
*(.got.plt)\r
__data_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.data1 : {\r
. = ALIGN(64);\r
*(.data1)\r
*(.data1.*)\r
__data1_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.got : {\r
*(.got)\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.got1 : {\r
*(.got1)\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.got2 : {\r
*(.got2)\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.ctors : {\r
. = ALIGN(64);\r
KEEP (*(.ctors))\r
__CTOR_END__ = .;\r
___CTORS_END___ = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.dtors : {\r
. = ALIGN(64);\r
KEEP (*(.dtors))\r
__DTOR_END__ = .;\r
___DTORS_END___ = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.fixup : {\r
__fixup_start = .;\r
*(.fixup)\r
__fixup_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.eh_frame : {\r
*(.eh_frame)\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.eh_framehdr : {\r
__eh_framehdr_start = .;\r
*(.eh_framehdr)\r
__eh_framehdr_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.gcc_except_table : {\r
*(.gcc_except_table)\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.mmu_tbl0 (ALIGN(4096)) : {\r
__mmu_tbl0_start = .;\r
*(.mmu_tbl0)\r
__mmu_tbl0_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.mmu_tbl1 (ALIGN(4096)) : {\r
__mmu_tbl1_start = .;\r
*(.mmu_tbl1)\r
__mmu_tbl1_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.mmu_tbl2 (ALIGN(4096)) : {\r
__mmu_tbl2_start = .;\r
*(.mmu_tbl2)\r
__mmu_tbl2_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.ARM.exidx : {\r
__exidx_start = .;\r
*(.ARM.exidx*)\r
*(.gnu.linkonce.armexidix.*.*)\r
__exidx_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.preinit_array : {\r
. = ALIGN(64);\r
KEEP (*(SORT(.preinit_array.*)))\r
KEEP (*(.preinit_array))\r
__preinit_array_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.init_array : {\r
. = ALIGN(64);\r
KEEP (*(SORT(.init_array.*)))\r
KEEP (*(.init_array))\r
__init_array_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.fini_array : {\r
. = ALIGN(64);\r
KEEP (*(SORT(.fini_array.*)))\r
KEEP (*(.fini_array))\r
__fini_array_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.ARM.attributes : {\r
__ARM.attributes_start = .;\r
*(.ARM.attributes)\r
__ARM.attributes_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.sdata : {\r
. = ALIGN(64);\r
*(.sdata.*)\r
*(.gnu.linkonce.s.*)\r
__sdata_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.sbss (NOLOAD) : {\r
. = ALIGN(64);\r
*(.gnu.linkonce.sb.*)\r
. = ALIGN(64);\r
__sbss_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.tdata : {\r
. = ALIGN(64);\r
*(.tdata.*)\r
*(.gnu.linkonce.td.*)\r
__tdata_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.tbss : {\r
. = ALIGN(64);\r
*(.tbss.*)\r
*(.gnu.linkonce.tb.*)\r
__tbss_end = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.bss (NOLOAD) : {\r
. = ALIGN(64);\r
*(COMMON)\r
. = ALIGN(64);\r
__bss_end__ = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );\r
\r
. += _HEAP_SIZE;\r
_heap_end = .;\r
HeapLimit = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
.stack (NOLOAD) : {\r
. = ALIGN(64);\r
. += _EL0_STACK_SIZE;\r
. = ALIGN(64);\r
__el0_stack = .;\r
-} > psu_ddr_0_S_AXI_BASEADDR\r
+} > psu_ddr_0_MEM_0\r
\r
_end = .;\r
}\r
*/\r
\r
/******************************************************************************\r
+ *\r
+ * See http://www.FreeRTOS.org/RTOS-Xilinx-UltraScale_MPSoC_64-bit.html for\r
+ * additional information on this demo.\r
+ *\r
* NOTE 1: This project provides two demo applications. A simple blinky\r
* style project, and a more comprehensive test and demo application. The\r
* mainSELECTED_APPLICATION setting in main.c is used to select between the two.\r
* NOTE 2: This file only contains the source code that is not specific to\r
* either the simply blinky or full demos - this includes initialisation code\r
* and callback functions.\r
+ *\r
+ * NOTE 3: This project builds the FreeRTOS source code, so is expecting the\r
+ * BSP project to be configured as a 'standalone' bsp project rather than a\r
+ * 'FreeRTOS' bsp project. However the BSP project MUST still be build with\r
+ * the FREERTOS_BSP symbol defined (-DFREERTOS_BSP must be added to the\r
+ * command line in the BSP configuration).\r
*/\r
\r
/* Standard includes. */\r
\r
int main( void )\r
{\r
+ /* See http://www.FreeRTOS.org/RTOS-Xilinx-UltraScale_MPSoC_64-bit.html for\r
+ additional information on this demo. */\r
+\r
/* Configure the hardware ready to run the demo. */\r
prvSetupHardware();\r
\r
for( ;; );\r
}\r
\r
+void *____memset(void *str, int c, size_t n)\r
+{\r
+size_t x;\r
+uint8_t *puc = ( uint8_t * ) str;\r
+\r
+ for( x = 0; x < c; x++ )\r
+ {\r
+ puc[ x ] = ( uint8_t ) c;\r
+ }\r
+\r
+ return str;\r
+}\r
void
disable_caches()
{
+#ifdef __MICROBLAZE__
+#ifdef XPAR_MICROBLAZE_USE_DCACHE
Xil_DCacheDisable();
+#endif
+#ifdef XPAR_MICROBLAZE_USE_ICACHE
Xil_ICacheDisable();
+#endif
+#endif
}
void
<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">\r
<storageModule moduleId="org.eclipse.cdt.core.settings">\r
- <cconfiguration id="org.eclipse.cdt.core.default.config.1606552079">\r
- <storageModule buildSystemId="org.eclipse.cdt.core.defaultConfigDataProvider" id="org.eclipse.cdt.core.default.config.1606552079" moduleId="org.eclipse.cdt.core.settings" name="Configuration">\r
+ <cconfiguration id="org.eclipse.cdt.core.default.config.200132248">\r
+ <storageModule buildSystemId="org.eclipse.cdt.core.defaultConfigDataProvider" id="org.eclipse.cdt.core.default.config.200132248" moduleId="org.eclipse.cdt.core.settings" name="Configuration">\r
<externalSettings/>\r
<extensions/>\r
</storageModule>\r
\r
%/make.include: $(if $(wildcard $(PROCESSOR)/lib/libxil_init.a),$(PROCESSOR)/lib/libxil.a,)\r
@echo "Running Make include in $(subst /make.include,,$@)"\r
- $(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=aarch64-none-elf-gcc" "ARCHIVER=aarch64-none-elf-ar" "COMPILER_FLAGS= -O2 -c" "EXTRA_COMPILER_FLAGS=-g -Wall -Wextra"\r
+ $(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=aarch64-none-elf-gcc" "ARCHIVER=aarch64-none-elf-ar" "COMPILER_FLAGS= -O2 -c" "EXTRA_COMPILER_FLAGS=-g -Wall -Wextra -DFREERTOS_BSP"\r
\r
%/make.libs: include\r
@echo "Running Make libs in $(subst /make.libs,,$@)"\r
- $(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=aarch64-none-elf-gcc" "ARCHIVER=aarch64-none-elf-ar" "COMPILER_FLAGS= -O2 -c" "EXTRA_COMPILER_FLAGS=-g -Wall -Wextra"\r
+ $(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=aarch64-none-elf-gcc" "ARCHIVER=aarch64-none-elf-ar" "COMPILER_FLAGS= -O2 -c" "EXTRA_COMPILER_FLAGS=-g -Wall -Wextra -DFREERTOS_BSP"\r
\r
%/make.clean: \r
$(MAKE) -C $(subst /make.clean,,$@) -s clean \r
PARAMETER DRIVER_NAME = cpu_cortexa53\r
PARAMETER DRIVER_VER = 1.5\r
PARAMETER HW_INSTANCE = psu_cortexa53_0\r
+ PARAMETER extra_compiler_flags = -g -Wall -Wextra -DFREERTOS_BSP\r
END\r
\r
\r
<?xml version="1.0" encoding="UTF-8"?>\r
<projectDescription>\r
<name>ZynqMP_ZCU102_hw_platform</name>\r
- <comment>Created by SDK v2016.4</comment>\r
+ <comment>Created by SDK v2018.1</comment>\r
<projects>\r
</projects>\r
<buildSpec>\r
</natures>\r
<filteredResources>\r
<filter>\r
- <id>1484841836970</id>\r
+ <id>1525357889050</id>\r
<name></name>\r
<type>6</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1484841836972</id>\r
+ <id>1525357889050</id>\r
<name></name>\r
<type>6</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1484841836978</id>\r
+ <id>1525357889065</id>\r
<name></name>\r
<type>6</type>\r
<matcher>\r