85xx: Handle eLBC difference w/36-bit physical

The eLBC only handles 32-bit physical address in systems with 36-bit
physical.  The previos generation of LBC handled 34-bit physical
address in 36-bit systems.  Added a new CONFIG option to convey
the difference between the LBC and eLBC.

Also added defines for XAM bits used in LBC for the extended 34-bit
support.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h
index e492c62a8bcb09053e1d50f31e5d863d75bcf8fb..9fa0b659499b8c21dd6cafa9fd9704c6a1076057 100644 (file)
--- a/include/asm-ppc/fsl_lbc.h
+++ b/include/asm-ppc/fsl_lbc.h
@@ -28,6 +28,8 @@
 
 #define BR_BA                          0xFFFF8000
 #define BR_BA_SHIFT                    15
+#define BR_XBA                         0x00006000
+#define BR_XBA_SHIFT                   13
 #define BR_PS                          0x00001800
 #define BR_PS_SHIFT                    11
 #define BR_PS_8                                0x00000800      /* Port Size 8 bit */
@@ -70,7 +72,7 @@
 #endif
 
 /* Convert an address into the right format for the BR registers */
-#ifdef CONFIG_PHYS_64BIT
+#if defined(CONFIG_PHYS_64BIT) && !defined(CONFIG_FSL_ELBC)
 #define BR_PHYS_ADDR(x)        ((unsigned long)((x & 0x0ffff8000ULL) | \
                                         ((x & 0x300000000ULL) >> 19)))
 #else
@@ -90,6 +92,8 @@
 
 #define OR_GPCM_AM                     0xFFFF8000
 #define OR_GPCM_AM_SHIFT               15
+#define OR_GPCM_XAM                    0x00006000
+#define OR_GPCM_XAM_SHIFT              13
 #define OR_GPCM_BCTLD                  0x00001000
 #define OR_GPCM_BCTLD_SHIFT            12
 #define OR_GPCM_CSNT                   0x00000800
@@ -132,6 +136,8 @@
 
 #define OR_FCM_AM                      0xFFFF8000
 #define OR_FCM_AM_SHIFT                                15
+#define OR_FCM_XAM                     0x00006000
+#define OR_FCM_XAM_SHIFT               13
 #define OR_FCM_BCTLD                   0x00001000
 #define OR_FCM_BCTLD_SHIFT                     12
 #define OR_FCM_PGS                     0x00000400

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 1898e265c99a65426c572265161dfaeda1c2b97d..e379d5327d9acbb709045312bc98567cf4f4f16e 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -34,6 +34,7 @@
 #define CONFIG_MPC8536         1
 #define CONFIG_MPC8536DS       1
 
+#define CONFIG_FSL_ELBC                1       /* Has Enhanced localbus controller */
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
 #define CONFIG_PCI1            1       /* Enable PCI controller 1 */
 #define CONFIG_PCIE1           1       /* PCIE controler 1 (slot 1) */

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 332a0e3378433676d9f34e23db5dcabc9726cacd..a0f4fcccbf6e4f670a9859d46ffc611f39524c5a 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -36,6 +36,7 @@
 #define CONFIG_MP              1       /* support multiple processors */
 #define CONFIG_NUM_CPUS                2       /* Number of CPUs in the system */
 
+#define CONFIG_FSL_ELBC                1       /* Has Enhanced localbus controller */
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
 #define CONFIG_PCIE1           1       /* PCIE controler 1 (slot 1) */
 #define CONFIG_PCIE2           1       /* PCIE controler 2 (slot 2) */