x86: Fix PCI UART compatible string for crownbay and galileo

With recent ns16550 driver changes, we only changed the legacy UART
(at I/O port 0x3f8) compatible string, but forgot to change the PCI
UART compatible string. Now fix it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index e17ce7153a9132484324b9c2db3a997b2c6512bf..84231b37783ea673c43b752e2bd285cd7e22ac0c 100644 (file)
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -117,7 +117,7 @@
                                                        "pci8086,8811",
                                                        "pciclass,070002",
                                                        "pciclass,0700",
-                                                       "x86-uart";
+                                                       "ns16550";
                                        u-boot,dm-pre-reloc;
                                        reg = <0x00025100 0x0 0x0 0x0 0x0
                                               0x01025110 0x0 0x0 0x0 0x0>;
@@ -131,7 +131,7 @@
                                                        "pci8086,8812",
                                                        "pciclass,070002",
                                                        "pciclass,0700",
-                                                       "x86-uart";
+                                                       "ns16550";
                                        u-boot,dm-pre-reloc;
                                        reg = <0x00025200 0x0 0x0 0x0 0x0
                                               0x01025210 0x0 0x0 0x0 0x0>;
@@ -145,7 +145,7 @@
                                                        "pci8086,8813",
                                                        "pciclass,070002",
                                                        "pciclass,0700",
-                                                       "x86-uart";
+                                                       "ns16550";
                                        u-boot,dm-pre-reloc;
                                        reg = <0x00025300 0x0 0x0 0x0 0x0
                                               0x01025310 0x0 0x0 0x0 0x0>;
@@ -159,7 +159,7 @@
                                                        "pci8086,8814",
                                                        "pciclass,070002",
                                                        "pciclass,0700",
-                                                       "x86-uart";
+                                                       "ns16550";
                                        u-boot,dm-pre-reloc;
                                        reg = <0x00025400 0x0 0x0 0x0 0x0
                                               0x01025410 0x0 0x0 0x0 0x0>;

diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index 2342de7c1061170fc8a27f7ad24c9b2a4dae0af7..55165e14646aa1c3720bc18f223b6b065acc1be8 100644 (file)
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -70,7 +70,7 @@
                                        "pci8086,0936",
                                        "pciclass,070002",
                                        "pciclass,0700",
-                                       "x86-uart";
+                                       "ns16550";
                        u-boot,dm-pre-reloc;
                        reg = <0x0000a500 0x0 0x0 0x0 0x0
                               0x0200a510 0x0 0x0 0x0 0x0>;