]> git.sur5r.net Git - u-boot/commitdiff
davinci: omapl138_lcdk: add NAND SPL boot support
authorFabien Parent <fparent@baylibre.com>
Tue, 29 Nov 2016 13:31:34 +0000 (14:31 +0100)
committerTom Rini <trini@konsulko.com>
Sat, 3 Dec 2016 18:21:18 +0000 (13:21 -0500)
NAND SPL boot was missing. Add it. The README specific to omapl138-lcdk
is also removed because its content does not apply anymore, i.e. the
generated AIS image can be flashed directly to the NAND without
using any external tool to create and bootable AIS image.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
board/davinci/da8xxevm/README.omapl138-lcdk [deleted file]
configs/omapl138_lcdk_defconfig
include/configs/omapl138_lcdk.h

diff --git a/board/davinci/da8xxevm/README.omapl138-lcdk b/board/davinci/da8xxevm/README.omapl138-lcdk
deleted file mode 100644 (file)
index ea0c53d..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-Summary
-=======
-This README assumes you have read README.da850.  It contains some additional
-information specific to building the omapl138-lcdk.  The AIS file as generated
-by the build is, currently, not useable due to differences in the flash
-available on this board, as compared to the da850evm boards.
-
-Flash Differences
-=================
-Refer to the discussion in [1] for more detail - basically the da850evm uses
-SPI flash whereas the lcdk uses NAND flash to store the bootloader, and
-the support isn't there in the SPL code.
-
-It should be possible to add the support in the SPL code should someone be
-sufficiently motivated.
-
-Using the built image
-=====================
-The output image to use is u-boot.bin.  This needs to be converted to an
-AIS file as described in [1] and then flashed using the utitilty linked to
-there and also described in README.da850.  You _may_ be able to write using
-u-boot itself, but the commands in README.da850 won't work as they write to
-SPI rather than NAND.
-
-Links
-=====
-[1]
- http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/386829
\ No newline at end of file
index 4a5f435550bf7eb039f1a96a51b84d4fb23c9760..52681c92d022e98c7d205ca65b72e3fe43bda336 100644 (file)
@@ -3,6 +3,7 @@ CONFIG_ARCH_DAVINCI=y
 CONFIG_TARGET_OMAPL138_LCDK=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_BOOTDELAY=3
 CONFIG_VERSION_VARIABLE=y
@@ -23,6 +24,8 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_UBI=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
index 5a6e7632b4995cd90d92fb3883378e31a3ee6624..fd88f122ae96a44ffa35feee445b951c74ef40a7 100644 (file)
 #define CONFIG_SYS_NAND_MASK_ALE       0x8
 #undef CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1 /* Max number of NAND devices */
+#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_SIZE      (2 << 10)
+#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE    0x200 /*0x60000*/
+#define CONFIG_SYS_NAND_U_BOOT_DST     0xc1080000
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP        (CONFIG_SYS_NAND_U_BOOT_DST - \
+                                       CONFIG_SYS_NAND_U_BOOT_SIZE - \
+                                       CONFIG_SYS_MALLOC_LEN -       \
+                                       GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_NAND_ECCPOS         {                               \
+                               24, 25, 26, 27, 28, \
+                               29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
+                               39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
+                               49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
+                               59, 60, 61, 62, 63 }
+#define CONFIG_SYS_NAND_PAGE_COUNT     64
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
+#define CONFIG_SYS_NAND_ECCSIZE                512
+#define CONFIG_SYS_NAND_ECCBYTES       10
+#define CONFIG_SYS_NAND_OOBSIZE                64
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_NAND_SIMPLE
+#define CONFIG_SPL_NAND_LOAD
 #endif
 
 #ifdef CONFIG_SYS_USE_NOR