]> git.sur5r.net Git - u-boot/commitdiff
ARM: tegra: implement MASK_BITS_31_29
authorTom Warren <twarren.nvidia@gmail.com>
Fri, 24 Jan 2014 17:16:22 +0000 (10:16 -0700)
committerTom Warren <twarren@nvidia.com>
Mon, 3 Feb 2014 16:46:45 +0000 (09:46 -0700)
Some clock sources have 3-bit muxes in bits 31:29. Implement core
support for this mux field.

Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, extracted from a larger patch by Tom]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/cpu/tegra-common/clock.c
arch/arm/include/asm/arch-tegra/clk_rst.h

index 96b705f2f6a4b750df404fcc790867481622122d..33bb19084b8cdb9a3ab2296d2bd9c71a8edc425e 100644 (file)
@@ -304,13 +304,27 @@ static int adjust_periph_pll(enum periph_id periph_id, int source,
        /* work out the source clock and set it */
        if (source < 0)
                return -1;
-       if (mux_bits == MASK_BITS_31_28) {
-               clrsetbits_le32(reg, OUT_CLK_SOURCE_31_28_MASK,
-                               source << OUT_CLK_SOURCE_31_28_SHIFT);
-       } else {
+
+       switch (mux_bits) {
+       case MASK_BITS_31_30:
                clrsetbits_le32(reg, OUT_CLK_SOURCE_31_30_MASK,
                                source << OUT_CLK_SOURCE_31_30_SHIFT);
+               break;
+
+       case MASK_BITS_31_29:
+               clrsetbits_le32(reg, OUT_CLK_SOURCE_31_29_MASK,
+                               source << OUT_CLK_SOURCE_31_29_SHIFT);
+               break;
+
+       case MASK_BITS_31_28:
+               clrsetbits_le32(reg, OUT_CLK_SOURCE_31_28_MASK,
+                               source << OUT_CLK_SOURCE_31_28_SHIFT);
+               break;
+
+       default:
+               return -1;
        }
+
        udelay(2);
        return 0;
 }
index 9f81237d2865d8d3a5826522f3d37ad834d3e48c..f07b83d26af41ea92bc618af3ccb8460d5499682 100644 (file)
@@ -236,6 +236,9 @@ enum {
 #define OUT_CLK_SOURCE_31_30_SHIFT     30
 #define OUT_CLK_SOURCE_31_30_MASK      (3U << OUT_CLK_SOURCE_31_30_SHIFT)
 
+#define OUT_CLK_SOURCE_31_29_SHIFT     29
+#define OUT_CLK_SOURCE_31_29_MASK      (7U << OUT_CLK_SOURCE_31_29_SHIFT)
+
 /* Note: See comment for MASK_BITS_31_28 in arch-tegra/clock.h */
 #define OUT_CLK_SOURCE_31_28_SHIFT     28
 #define OUT_CLK_SOURCE_31_28_MASK      (15U << OUT_CLK_SOURCE_31_28_SHIFT)