]> git.sur5r.net Git - u-boot/commitdiff
ppc/85xx: Clean up MPC8569 MDS PCI setup code
authorKumar Gala <galak@kernel.crashing.org>
Wed, 4 Nov 2009 16:26:30 +0000 (10:26 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Tue, 5 Jan 2010 19:49:05 +0000 (13:49 -0600)
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
board/freescale/mpc8569mds/mpc8569mds.c

index cdd7813011a5b1ea2e9865f79f8c1a3d8b03df8c..4612d165b6cb9d8ee8529ea6ba7d982819612d0c 100644 (file)
@@ -514,77 +514,43 @@ static void fdt_board_fixup_qe_usb(void *blob, bd_t *bd)
 static struct pci_controller pcie1_hose;
 #endif  /* CONFIG_PCIE1 */
 
-int first_free_busno = 0;
-
 #ifdef CONFIG_PCI
-void
-pci_init_board(void)
+void pci_init_board(void)
 {
-       volatile ccsr_gur_t *gur;
-       uint io_sel;
-       uint host_agent;
-
-       gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-       io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
-       host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
-
-#ifdef CONFIG_PCIE1
-{
-       volatile ccsr_fsl_pci_t *pci;
-       struct pci_controller *hose;
-       int pcie_ep;
-       struct pci_region *r;
-       int pcie_configured;
-
-       pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-       hose = &pcie1_hose;
-       pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent);
-       r = hose->regions;
-       pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
-
-       if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){
-               printf ("\n    PCIE connected to slot as %s (base address %x)",
-                       pcie_ep ? "End Point" : "Root Complex",
-                       (uint)pci);
-
-               if (pci->pme_msg_det) {
-                       pci->pme_msg_det = 0xffffffff;
-                       debug (" with errors.  Clearing. Now 0x%08x",
-                               pci->pme_msg_det);
-               }
-               printf ("\n");
-
-               /* outbound memory */
-               pci_set_region(r++,
-                               CONFIG_SYS_PCIE1_MEM_BUS,
-                               CONFIG_SYS_PCIE1_MEM_PHYS,
-                               CONFIG_SYS_PCIE1_MEM_SIZE,
-                               PCI_REGION_MEM);
-
-               /* outbound io */
-               pci_set_region(r++,
-                               CONFIG_SYS_PCIE1_IO_BUS,
-                               CONFIG_SYS_PCIE1_IO_PHYS,
-                               CONFIG_SYS_PCIE1_IO_SIZE,
-                               PCI_REGION_IO);
+       volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+       struct fsl_pci_info pci_info[1];
+       u32 devdisr, pordevsr, io_sel;
+       int first_free_busno = 0;
+       int num = 0;
 
-               hose->region_count = r - hose->regions;
+       int pcie_ep, pcie_configured;
 
-               hose->first_busno=first_free_busno;
+       devdisr = in_be32(&gur->devdisr);
+       pordevsr = in_be32(&gur->pordevsr);
+       io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
 
-               fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
-               printf ("PCIE on bus %02x - %02x\n",
-                               hose->first_busno,hose->last_busno);
+       debug ("   pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
 
-               first_free_busno=hose->last_busno+1;
+#ifdef CONFIG_PCIE1
+       pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
 
+       if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
+               SET_STD_PCIE_INFO(pci_info[num], 1);
+               pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
+               printf ("    PCIE1 connected to Slot as %s (base addr %lx)\n",
+                               pcie_ep ? "End Point" : "Root Complex",
+                               pci_info[num].regs);
+               first_free_busno = fsl_pci_init_port(&pci_info[num++],
+                                       &pcie1_hose, first_free_busno);
        } else {
-               printf ("    PCIE: disabled\n");
+               printf ("    PCIE1: disabled\n");
        }
-}
+
+       puts("\n");
 #else
-       gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */
+       setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */
 #endif
+
 }
 #endif /* CONFIG_PCI */