]> git.sur5r.net Git - u-boot/commitdiff
arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded data
authorMarek Vasut <marex@denx.de>
Sat, 5 Dec 2015 18:24:22 +0000 (19:24 +0100)
committerMarek Vasut <marex@denx.de>
Sun, 20 Dec 2015 02:36:50 +0000 (03:36 +0100)
This patch adds the necessary OF alias for the UDC node, which let's
the code locate the DWC2 UDC base address in OF instead of hard-coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is
removed and USB DM support is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Lukasz Majewski <l.majewski@majess.pl>
Cc: Lukasz Majewski <l.majewski@samsung.com>
arch/arm/dts/socfpga_cyclone5_socdk.dts
board/altera/cyclone5-socdk/socfpga.c
configs/socfpga_cyclone5_defconfig
include/configs/socfpga_cyclone5_socdk.h

index 9eb5a2209c63b721ec5bc7fd773572703ef368be..224928f75578c874db31f86b24265f49cf05055e 100644 (file)
@@ -25,6 +25,7 @@
                 * to be added to the gmac1 device tree blob.
                 */
                ethernet0 = &gmac1;
+               udc0 = &usb1;
        };
 
        regulator_3_3v: 3-3-v-regulator {
        vqmmc-supply = <&regulator_3_3v>;
 };
 
-&usb1 {
-       status = "okay";
-};
-
 &qspi {
        status = "okay";
 
                tslch-ns = <4>;
        };
 };
+
+&usb1 {
+       status = "okay";
+};
index ccb1b4b063e39e1f6633c74ebff20f6a0b282a38..449f3b5d50185a4f7c4596a8374c0f36aec6ada6 100644 (file)
@@ -5,12 +5,12 @@
  */
 
 #include <common.h>
+#include <errno.h>
 #include <asm/arch/reset_manager.h>
 #include <asm/io.h>
 
 #include <usb.h>
 #include <usb/dwc2_udc.h>
-#include <usb_mass_storage.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -29,12 +29,29 @@ int board_init(void)
 
 #ifdef CONFIG_USB_GADGET
 struct dwc2_plat_otg_data socfpga_otg_data = {
-       .regs_otg       = CONFIG_USB_DWC2_REG_ADDR,
        .usb_gusbcfg    = 0x1417,
 };
 
 int board_usb_init(int index, enum usb_init_type init)
 {
+       int node[2], count;
+       fdt_addr_t addr;
+
+       count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc",
+                                          COMPAT_ALTERA_SOCFPGA_DWC2USB,
+                                          node, 2);
+       if (count <= 0) /* No controller found. */
+               return 0;
+
+       addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg");
+       if (addr == FDT_ADDR_T_NONE) {
+               printf("UDC Controller has no 'reg' property!\n");
+               return -EINVAL;
+       }
+
+       /* Patch the address from OF into the controller pdata. */
+       socfpga_otg_data.regs_otg = addr;
+
        return dwc2_udc_probe(&socfpga_otg_data);
 }
 
index c0d6913425ede1151c04002005a947ed24a88953..864358c9519d8f7e4b04f0ae3cc37741bced8d2e 100644 (file)
@@ -21,3 +21,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
 CONFIG_DM_MMC=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
index 5e4a7098049f0cf6d492b8e788d80d3f1da5e038..76d29a3f7807c6a30800133c1a2b1882c79edc87 100644 (file)
@@ -56,9 +56,6 @@
 #define CONFIG_ENV_OFFSET              512     /* just after the MBR */
 
 /* USB */
-#ifdef CONFIG_CMD_USB
-#define CONFIG_USB_DWC2_REG_ADDR       SOCFPGA_USB1_ADDRESS
-#endif
 #define CONFIG_G_DNL_MANUFACTURER      "Altera"
 
 /* Extra Environment */