]> git.sur5r.net Git - u-boot/commitdiff
85xx: separate FLASH BASE virtual from physical address
authorKumar Gala <galak@kernel.crashing.org>
Tue, 2 Dec 2008 20:19:34 +0000 (14:19 -0600)
committerAndrew Fleming-AFLEMING <afleming@freescale.com>
Fri, 23 Jan 2009 23:03:13 +0000 (17:03 -0600)
Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and
maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash.

This allows us to deal with 36-bit phys on these boards in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
board/freescale/mpc8536ds/law.c
board/freescale/mpc8536ds/mpc8536ds.c
board/freescale/mpc8536ds/tlb.c
board/freescale/mpc8572ds/law.c
board/freescale/mpc8572ds/mpc8572ds.c
board/freescale/mpc8572ds/tlb.c
include/configs/MPC8536DS.h
include/configs/MPC8572DS.h

index caccce425cb96be4b142ceee31315a401e91b7b4..31614d2388700f9ff1a3496750f768b58ffa002d 100644 (file)
@@ -30,7 +30,7 @@
 struct law_entry law_table[] = {
        SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI),
        SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI),
-       SET_LAW(CONFIG_SYS_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
+       SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
        SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAWAR_SIZE_128M, LAW_TRGT_IF_PCIE_1),
        SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
        SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAWAR_SIZE_128M, LAW_TRGT_IF_PCIE_2),
index 2b17612b336906cd519a97e7bcba2c2f58e63ec2..e369d090ccfd46c8d53ff541bbc022951ab5dd63 100644 (file)
@@ -433,7 +433,7 @@ int board_early_init_r(void)
        /* invalidate existing TLB entry for flash + promjet */
        disable_tlb(flash_esel);
 
-       set_tlb(1, flashbase, flashbase,                /* tlb, epn, rpn */
+       set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,       /* tlb, epn, rpn */
                MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
                0, flash_esel, BOOKE_PAGESZ_256M, 1);   /* ts, esel, tsize, iprot */
 
index 89d5097becacb43c965f0daf1728e3a70ff48d8f..f4bab550c63eb105d2a58cdbfdad2b111e23bc09 100644 (file)
@@ -53,7 +53,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 
        /* W**G* - Flash/promjet, localbus */
        /* This will be changed to *I*G* after relocation to RAM. */
-       SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
+       SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,
                      MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
                      0, 1, BOOKE_PAGESZ_256M, 1),
 
index 9814479f62e953543d3818fe7459215ea74c5eaa..02ea0ec59ed601f0ba6e2bfc930652fbb0783922 100644 (file)
@@ -28,7 +28,7 @@
 #include <asm/mmu.h>
 
 struct law_entry law_table[] = {
-       SET_LAW(CONFIG_SYS_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
+       SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
        SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_1),
        SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
        SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2),
index c2487e5b844794e524bc613f8631264d91818268..88ab06d789b3d4db3ebae7e0b41530a2f2e700e7 100644 (file)
@@ -358,7 +358,7 @@ int board_early_init_r(void)
        /* invalidate existing TLB entry for flash + promjet */
        disable_tlb(flash_esel);
 
-       set_tlb(1, flashbase, flashbase,                /* tlb, epn, rpn */
+       set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,       /* tlb, epn, rpn */
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
                        0, flash_esel, BOOKE_PAGESZ_256M, 1);   /* ts, esel, tsize, iprot */
 
index d540859334bf52f8a79d114458d5a5226bad735a..6cb3eb1d9e9a1a57ecd6f279dfcc77025c3f8e01 100644 (file)
@@ -54,7 +54,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 
        /* W**G* - Flash/promjet, localbus */
        /* This will be changed to *I*G* after relocation to RAM. */
-       SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
+       SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,
                      MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
                      0, 2, BOOKE_PAGESZ_256M, 1),
 
index 3ea1b48169e1b5dd1bbfee1e823f87c8ab429272..fb9fc2e02778bbc6c55e18ba2e7d3a50144fc0a6 100644 (file)
@@ -166,12 +166,13 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
  * Local Bus Definitions
  */
 #define CONFIG_SYS_FLASH_BASE          0xe0000000      /* start of FLASH 128M */
+#define CONFIG_SYS_FLASH_BASE_PHYS     CONFIG_SYS_FLASH_BASE
 
-#define CONFIG_SYS_BR0_PRELIM          0xe8001001
-#define CONFIG_SYS_OR0_PRELIM          0xf8000ff7
+#define CONFIG_SYS_BR0_PRELIM  (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | BR_PS_16 | BR_V)
+#define CONFIG_SYS_OR0_PRELIM  0xf8000ff7
 
-#define CONFIG_SYS_BR1_PRELIM          0xe0001001
-#define CONFIG_SYS_OR1_PRELIM          0xf8000ff7
+#define CONFIG_SYS_BR1_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
+#define CONFIG_SYS_OR1_PRELIM  0xf8000ff7
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE + 0x8000000, CONFIG_SYS_FLASH_BASE}
 #define CONFIG_SYS_FLASH_QUIET_TEST
index 6e42b289d713b14f3b57b431b3da9c26b703916b..6b56a0e08b893f5369b891b97a933c966f712bbe 100644 (file)
@@ -169,12 +169,13 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
  * Local Bus Definitions
  */
 #define CONFIG_SYS_FLASH_BASE          0xe0000000      /* start of FLASH 128M */
+#define CONFIG_SYS_FLASH_BASE_PHYS     CONFIG_SYS_FLASH_BASE
 
-#define CONFIG_SYS_BR0_PRELIM          0xe8001001
-#define CONFIG_SYS_OR0_PRELIM          0xf8000ff7
+#define CONFIG_SYS_BR0_PRELIM  (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | BR_PS_16 | BR_V)
+#define CONFIG_SYS_OR0_PRELIM  0xf8000ff7
 
-#define CONFIG_SYS_BR1_PRELIM          0xe0001001
-#define CONFIG_SYS_OR1_PRELIM          0xf8000ff7
+#define CONFIG_SYS_BR1_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
+#define CONFIG_SYS_OR1_PRELIM  0xf8000ff7
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE + 0x8000000, CONFIG_SYS_FLASH_BASE}
 #define CONFIG_SYS_FLASH_QUIET_TEST