Macros for drive strength configuration were missing.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
#define ATMEL_PIO_IFSCEN_MASK BIT(13)
#define ATMEL_PIO_OPD_MASK BIT(14)
#define ATMEL_PIO_SCHMITT_MASK BIT(15)
+#define ATMEL_PIO_DRVSTR_MASK GENMASK(17, 16)
+#define ATMEL_PIO_DRVSTR_LO (1 << 16)
+#define ATMEL_PIO_DRVSTR_ME (2 << 16)
+#define ATMEL_PIO_DRVSTR_HI (3 << 16)
#define ATMEL_PIO_CFGR_EVTSEL_MASK GENMASK(26, 24)
#define ATMEL_PIO_CFGR_EVTSEL_FALLING (0 << 24)
#define ATMEL_PIO_CFGR_EVTSEL_RISING (1 << 24)