]> git.sur5r.net Git - u-boot/commitdiff
ARM: dts: uniphier: add reference clock nodes
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Tue, 2 Feb 2016 12:11:33 +0000 (21:11 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Sun, 14 Feb 2016 07:36:13 +0000 (16:36 +0900)
Add master clock nodes generated by crystal oscillators.

  PH1-sLD3, PH1-LD4: 24.576 MHz
  PH1-Pro4, ProXstream2: 25.000 MHz
  PH1-Pro5: 20.000 MHz

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/dts/uniphier-common32.dtsi
arch/arm/dts/uniphier-ph1-ld4.dtsi
arch/arm/dts/uniphier-ph1-pro4.dtsi
arch/arm/dts/uniphier-ph1-pro5.dtsi
arch/arm/dts/uniphier-ph1-sld3.dtsi
arch/arm/dts/uniphier-ph1-sld8.dtsi
arch/arm/dts/uniphier-proxstream2.dtsi

index 5d4b2cf4c33eaad16c386cbede08aae8ce246036..de04de1111eae5c3fa74b5fa212bc776ffd6c910 100644 (file)
@@ -9,6 +9,13 @@
 /include/ "skeleton.dtsi"
 
 / {
+       clocks {
+               refclk: ref {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+               };
+       };
+
        soc: soc {
                compatible = "simple-bus";
                #address-cells = <1>;
index 856c207b13645cac700ae8abff54bf0821d42736..6f15978a8d3c710b70922493d9b91725c0c3b095 100644 (file)
        };
 };
 
+&refclk {
+       clock-frequency = <24576000>;
+};
+
 &serial0 {
        clock-frequency = <36864000>;
 };
index 244ccf67e6637712787f673229e5c5bfabed8f0b..a236dbc13f9c75f30f4d4e5c30904e9f8d76ab15 100644 (file)
        };
 };
 
+&refclk {
+       clock-frequency = <25000000>;
+};
+
 &serial0 {
        clock-frequency = <73728000>;
 };
index 00491062fe74ea99b34530b4e791871128050bbe..120767c7fae428bffc60aea9a2ec483c51a66fcc 100644 (file)
        };
 };
 
+&refclk {
+       clock-frequency = <20000000>;
+};
+
 &serial0 {
        clock-frequency = <73728000>;
 };
index f481521a0fe0cbb9490d148c0f0a0ff998acb315..9ff9584991e6951b4f9e42a0e956e24b8f22d614 100644 (file)
        };
 
        clocks {
+               refclk: ref {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <24576000>;
+               };
+
                arm_timer_clk: arm_timer_clk {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
index cb28bc4508252ebb5517c9d5416c37ff15467131..e765a4bb073346cc41455c98c719e25ee70b5642 100644 (file)
        };
 };
 
+&refclk {
+       clock-frequency = <25000000>;
+};
+
 &serial0 {
        clock-frequency = <80000000>;
 };
index 3ba6a4ae51d57b8f0867b3cc2484306d552cf391..c7423ff9b6868dcc9150cbfccda6195250928be1 100644 (file)
        };
 };
 
+&refclk {
+       clock-frequency = <25000000>;
+};
+
 &serial0 {
        clock-frequency = <88900000>;
 };