COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */
COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */
COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */
+ COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */
+ COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5 SROMC */
COMPAT_COUNT,
};
COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
+ COMPAT(SMSC_LAN9215, "smsc,lan9215"),
+ COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)