]> git.sur5r.net Git - u-boot/commitdiff
arm: rmobile: koelsch: Change to maximum CPU frequency
authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Mon, 31 Mar 2014 02:52:51 +0000 (11:52 +0900)
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>
Sun, 27 Apr 2014 19:35:12 +0000 (04:35 +0900)
Maximum CPU clock of R8A7791 that are used in koelsch board is 1.5GHz.
This change to use the maximum clock in this board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
board/renesas/koelsch/koelsch.c

index d4f63724b44873d28f920d6cdc7d28f9b492bdff..bfd0cc6884b7f754be4a6a2525e08e4df22b53a9 100644 (file)
 #include <netdev.h>
 #include <miiphy.h>
 #include <i2c.h>
+#include <div64.h>
 #include "qos.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define CLK2MHZ(clk)   (clk / 1000 / 1000)
 void s_init(void)
 {
        struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
        struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
+       u32 stc;
 
        /* Watchdog init */
        writel(0xA5A5A500, &rwdt->rwtcsra);
        writel(0xA5A5A500, &swdt->swtcsra);
 
+       /* CPU frequency setting. Set to 1.5GHz */
+       stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+       clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
+
        /* QoS */
        qos_init();
 }