]> git.sur5r.net Git - u-boot/commitdiff
mxc_spi: Round up clock divider
authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Fri, 10 Aug 2012 08:51:50 +0000 (08:51 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 1 Sep 2012 12:58:25 +0000 (14:58 +0200)
Since the input frequency of the API is a maximum that should not be exceeded in
order for the devices to operate properly, the SPI clock divider should be
rounded up, not truncated.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
drivers/spi/mxc_spi.c

index 2e1531858d32f8ab1f6b02fd5a9ac2e171387fa5..cf1462f94f8714e030d507a1117597eafd219841 100644 (file)
@@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 
        clk_src = mxc_get_clock(MXC_CSPI_CLK);
 
-       div = clk_src / max_hz;
+       div = DIV_ROUND_UP(clk_src, max_hz);
        div = get_cspi_div(div);
 
        debug("clk %d Hz, div %d, real clk %d Hz\n",
@@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
         * The following computation is taken directly from Freescale's code.
         */
        if (clk_src > max_hz) {
-               pre_div = clk_src / max_hz;
+               pre_div = DIV_ROUND_UP(clk_src, max_hz);
                if (pre_div > 16) {
                        post_div = pre_div / 16;
                        pre_div = 15;