Since the input frequency of the API is a maximum that should not be exceeded in
order for the devices to operate properly, the SPI clock divider should be
rounded up, not truncated.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
 
        clk_src = mxc_get_clock(MXC_CSPI_CLK);
 
-       div = clk_src / max_hz;
+       div = DIV_ROUND_UP(clk_src, max_hz);
        div = get_cspi_div(div);
 
        debug("clk %d Hz, div %d, real clk %d Hz\n",
         * The following computation is taken directly from Freescale's code.
         */
        if (clk_src > max_hz) {
-               pre_div = clk_src / max_hz;
+               pre_div = DIV_ROUND_UP(clk_src, max_hz);
                if (pre_div > 16) {
                        post_div = pre_div / 16;
                        pre_div = 15;