]> git.sur5r.net Git - u-boot/commitdiff
arm: socfpga: Unbind CPU type from board type
authorMarek Vasut <marex@denx.de>
Sun, 2 Aug 2015 19:57:57 +0000 (21:57 +0200)
committerMarek Vasut <marex@denx.de>
Sun, 23 Aug 2015 09:56:19 +0000 (11:56 +0200)
The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
selected both a board and a CPU. This is not correct as these macros
are supposed to select only board.

All would be good, if QTS-generated header files didn't check for
these macros exactly to determine if the platform is Cyclone V or
Arria V. Thus, for the sake of compatibility with not well fleshed
out header file generator, this patch makes these two macros into
a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK
and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the
previous stub config option.

The result is that compatibility with QTS is preserved and the new
CONFIG_TARGET_* select actual target boards.

Signed-off-by: Marek Vasut <marex@denx.de>
arch/arm/mach-socfpga/Kconfig
configs/socfpga_arria5_defconfig
configs/socfpga_cyclone5_defconfig
configs/socfpga_socrates_defconfig

index e46c3489959c57ed39f701fd4db7201fc8fdb3d3..1a441ff4ad38112fbbf8c01640f6bb8a7f5e45d2 100644 (file)
@@ -1,28 +1,38 @@
 if ARCH_SOCFPGA
 
+config TARGET_SOCFPGA_ARRIA5
+       bool
+
+config TARGET_SOCFPGA_CYCLONE5
+       bool
+
 choice
        prompt "Altera SOCFPGA board select"
        optional
 
-config TARGET_SOCFPGA_ARRIA5
-       bool "Altera SOCFPGA Arria V"
+config TARGET_SOCFPGA_ARRIA5_SOCDK
+       bool "Altera SOCFPGA SoCDK (Arria V)"
+       select TARGET_SOCFPGA_ARRIA5
 
-config TARGET_SOCFPGA_CYCLONE5
-       bool "Altera SOCFPGA Cyclone V"
+config TARGET_SOCFPGA_CYCLONE5_SOCDK
+       bool "Altera SOCFPGA SoCDK (Cyclone V)"
+       select TARGET_SOCFPGA_CYCLONE5
 
 endchoice
 
 config SYS_BOARD
-       default "socfpga"
+       default "socfpga" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "socfpga" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 
 config SYS_VENDOR
-       default "altera"
+       default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 
 config SYS_SOC
        default "socfpga"
 
 config SYS_CONFIG_NAME
-       default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5
-       default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5
+       default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 
 endif
index f406db7cfdd4b9f221a0d75fbb9500e5b0418b70..dcd5cb34ee0a3b3d47b6f1aef25a69fc4202fa6c 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_TARGET_SOCFPGA_ARRIA5=y
+CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
 CONFIG_SPL=y
 # CONFIG_CMD_IMLS is not set
index 75207bf5d06422a936807df8deaf2f161dfc5dfe..190cdae8527ce545bbc263a060b42f468414072e 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_TARGET_SOCFPGA_CYCLONE5=y
+CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
 CONFIG_SPL=y
 # CONFIG_CMD_IMLS is not set
index c38f1ab345f27603fab45b02a53f2e7c651352ae..16bfb7d4e06d3c7ac89d5dfe358ffa30f23d5a4d 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_TARGET_SOCFPGA_CYCLONE5=y
+CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
 CONFIG_SPL=y
 # CONFIG_CMD_IMLS is not set