]> git.sur5r.net Git - u-boot/commitdiff
arm: at91: Change the Chip ID registers' addresses
authorWenyou Yang <wenyou.yang@atmel.com>
Tue, 8 Sep 2015 06:38:26 +0000 (14:38 +0800)
committerAndreas Bießmann <andreas.devel@googlemail.com>
Tue, 3 Nov 2015 13:21:30 +0000 (14:21 +0100)
Provide the specific addresses for the Chip ID and Chip ID Extension
registers, instead of the offset, which make it use on other chips.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
arch/arm/mach-at91/armv7/cpu.c
arch/arm/mach-at91/include/mach/at91_dbu.h
arch/arm/mach-at91/include/mach/sama5d3.h
arch/arm/mach-at91/include/mach/sama5d4.h

index 8d86f97e3dab36be1b26af44ec9999a2c4d3a477..7843aed813a846e58fcb3f03395de913328d36ee 100644 (file)
@@ -12,7 +12,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/at91_dbu.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pit.h>
 #include <asm/arch/at91_gpbr.h>
@@ -65,12 +64,14 @@ void enable_caches(void)
        dcache_enable();
 }
 
+#define ATMEL_CHIPID_CIDR_VERSION      0x1f
+
 unsigned int get_chip_id(void)
 {
-       return readl(ATMEL_BASE_DBGU + AT91_DBU_CIDR) & ~AT91_DBU_CIDR_MASK;
+       return readl(ATMEL_CHIPID_CIDR) & ~ATMEL_CHIPID_CIDR_VERSION;
 }
 
 unsigned int get_extension_chip_id(void)
 {
-       return readl(ATMEL_BASE_DBGU + AT91_DBU_EXID);
+       return readl(ATMEL_CHIPID_EXID);
 }
index 7346fc0569b463d13c6a747ff0bc50ca6873f063..3181138322b94a8345e465b576e5360616ca9c99 100644 (file)
@@ -35,8 +35,4 @@ typedef struct at91_dbu {
 #define AT91_DBU_CID_ARCH_9xx          0x01900000
 #define AT91_DBU_CID_ARCH_9XExx        0x02900000
 
-#define AT91_DBU_CIDR_MASK             0x1f
-#define AT91_DBU_CIDR                  0x40
-#define AT91_DBU_EXID                  0x44
-
 #endif
index b749cb3359728bd5444da509fca1338cd5fcf6b5..33f6c97c11d32501236317c96e7876b50f8f4202 100644 (file)
 #define ATMEL_BASE_RTC         0xfffffeb0
 /* Reserved:   0xfffffee0 - 0xffffffff */
 
+#define ATMEL_CHIPID_CIDR      0xffffee40
+#define ATMEL_CHIPID_EXID      0xffffee44
+
 /*
  * Internal Memory.
  */
index 7773ace43925d6025646edf5237f4a49eeb53b04..3da8aff27ee6ce154b138aaf935884da737dfa3c 100644 (file)
 #define ATMEL_BASE_PIOE                0xfc06d000
 #define ATMEL_BASE_AIC         0xfc06e000
 
+#define ATMEL_CHIPID_CIDR      0xfc069040
+#define ATMEL_CHIPID_EXID      0xfc069044
+
 /*
  * Internal Memory.
  */