]> git.sur5r.net Git - u-boot/commitdiff
ARM: dts: k2l: Enable OF_CONTROL and DM
authorLokesh Vutla <lokeshvutla@ti.com>
Sat, 19 Sep 2015 09:30:21 +0000 (15:00 +0530)
committerTom Rini <trini@konsulko.com>
Thu, 22 Oct 2015 18:21:39 +0000 (14:21 -0400)
Import k2l specific DT files from Linux Kernel and enable
OF_CONTROL, DM, DM_SERIAL.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
arch/arm/dts/Makefile
arch/arm/dts/k2l-clocks.dtsi [new file with mode: 0644]
arch/arm/dts/k2l-evm.dts [new file with mode: 0644]
arch/arm/dts/k2l-netcp.dtsi [new file with mode: 0644]
arch/arm/dts/k2l.dtsi [new file with mode: 0644]
configs/k2l_evm_defconfig

index 09b8d435970ca4f9cf85a2395204771d9f2912e9..c59c398f924ac9aeff51deb3aed1c52a437a8733 100644 (file)
@@ -169,7 +169,8 @@ dtb-$(CONFIG_MACH_SUN9I) += \
 dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
        vf610-colibri.dtb
 
-dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb
+dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
+       k2l-evm.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/arm/dts/k2l-clocks.dtsi b/arch/arm/dts/k2l-clocks.dtsi
new file mode 100644 (file)
index 0000000..ef8464b
--- /dev/null
@@ -0,0 +1,266 @@
+/*
+ * Copyright 2013-2014 Texas Instruments, Inc.
+ *
+ * Keystone 2 lamarr SoC clock nodes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+clocks {
+       armpllclk: armpllclk@2620370 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,pll-clock";
+               clocks = <&refclksys>;
+               clock-output-names = "arm-pll-clk";
+               reg = <0x02620370 4>;
+               reg-names = "control";
+       };
+
+       mainpllclk: mainpllclk@2310110 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,main-pll-clock";
+               clocks = <&refclksys>;
+               reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
+               reg-names = "control", "multiplier", "post-divider";
+       };
+
+       papllclk: papllclk@2620358 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,pll-clock";
+               clocks = <&refclksys>;
+               clock-output-names = "papllclk";
+               reg = <0x02620358 4>;
+               reg-names = "control";
+       };
+
+       ddr3apllclk: ddr3apllclk@2620360 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,pll-clock";
+               clocks = <&refclksys>;
+               clock-output-names = "ddr-3a-pll-clk";
+               reg = <0x02620360 4>;
+               reg-names = "control";
+       };
+
+       clkdfeiqnsys: clkdfeiqnsys {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk12>;
+               clock-output-names = "dfe";
+               reg-names = "control", "domain";
+               reg = <0x02350004 0xb00>, <0x02350000 0x400>;
+               domain-id = <0>;
+       };
+
+       clkpcie1: clkpcie1 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk12>;
+               clock-output-names = "pcie";
+               reg = <0x0235002c 0xb00>, <0x02350000 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <4>;
+       };
+
+       clkgem1: clkgem1 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk1>;
+               clock-output-names = "gem1";
+               reg = <0x02350040 0xb00>, <0x02350024 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <9>;
+       };
+
+       clkgem2: clkgem2 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk1>;
+               clock-output-names = "gem2";
+               reg = <0x02350044 0xb00>, <0x02350028 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <10>;
+       };
+
+       clkgem3: clkgem3 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk1>;
+               clock-output-names = "gem3";
+               reg = <0x02350048 0xb00>, <0x0235002c 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <11>;
+       };
+
+       clktac: clktac {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "tac";
+               reg = <0x02350064 0xb00>, <0x02350044 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <17>;
+       };
+
+       clkrac: clkrac {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "rac";
+               reg = <0x02350068 0xb00>, <0x02350044 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <17>;
+       };
+
+       clkdfepd0: clkdfepd0 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "dfe-pd0";
+               reg = <0x0235006c 0xb00>, <0x02350044 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <18>;
+       };
+
+       clkfftc0: clkfftc0 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "fftc-0";
+               reg = <0x02350070 0xb00>, <0x0235004c 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <19>;
+       };
+
+       clkosr: clkosr {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "osr";
+               reg = <0x02350088 0xb00>, <0x0235004c 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <21>;
+       };
+
+       clktcp3d0: clktcp3d0 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "tcp3d-0";
+               reg = <0x0235008c 0xb00>, <0x02350058 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <22>;
+       };
+
+       clktcp3d1: clktcp3d1 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "tcp3d-1";
+               reg = <0x02350094 0xb00>, <0x02350058 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <23>;
+       };
+
+       clkvcp0: clkvcp0 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "vcp-0";
+               reg = <0x0235009c 0xb00>, <0x02350060 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <24>;
+       };
+
+       clkvcp1: clkvcp1 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "vcp-1";
+               reg = <0x023500a0 0xb00>, <0x02350060 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <24>;
+       };
+
+       clkvcp2: clkvcp2 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "vcp-2";
+               reg = <0x023500a4 0xb00>, <0x02350060 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <24>;
+       };
+
+       clkvcp3: clkvcp3 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "vcp-3";
+               reg = <0x023500a8 0xb00>, <0x02350060 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <24>;
+       };
+
+       clkbcp: clkbcp {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "bcp";
+               reg = <0x023500bc 0xb00>, <0x02350068 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <26>;
+       };
+
+       clkdfepd1: clkdfepd1 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "dfe-pd1";
+               reg = <0x023500c0 0xb00>, <0x02350044 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <27>;
+       };
+
+       clkfftc1: clkfftc1 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "fftc-1";
+               reg = <0x023500c4 0xb00>, <0x023504c0 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <28>;
+       };
+
+       clkiqnail: clkiqnail {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&chipclk13>;
+               clock-output-names = "iqn-ail";
+               reg = <0x023500c8 0xb00>, <0x0235004c 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <29>;
+       };
+
+       clkuart2: clkuart2 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&clkmodrst0>;
+               clock-output-names = "uart2";
+               reg = <0x02350000 0xb00>, <0x02350000 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <0>;
+       };
+
+       clkuart3: clkuart3 {
+               #clock-cells = <0>;
+               compatible = "ti,keystone,psc-clock";
+               clocks = <&clkmodrst0>;
+               clock-output-names = "uart3";
+               reg = <0x02350000 0xb00>, <0x02350000 0x400>;
+               reg-names = "control", "domain";
+               domain-id = <0>;
+       };
+};
diff --git a/arch/arm/dts/k2l-evm.dts b/arch/arm/dts/k2l-evm.dts
new file mode 100644 (file)
index 0000000..9a69a6b
--- /dev/null
@@ -0,0 +1,131 @@
+/*
+ * Copyright 2014 Texas Instruments, Inc.
+ *
+ * Keystone 2 Lamarr EVM device tree
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "keystone.dtsi"
+#include "k2l.dtsi"
+
+/ {
+       compatible =  "ti,k2l-evm","ti,keystone";
+       model = "Texas Instruments Keystone 2 Lamarr EVM";
+
+       soc {
+               clocks {
+                       refclksys: refclksys {
+                               #clock-cells = <0>;
+                               compatible = "fixed-clock";
+                               clock-frequency = <122880000>;
+                               clock-output-names = "refclk-sys";
+                       };
+               };
+       };
+};
+
+&usb_phy {
+       status = "okay";
+};
+
+&usb {
+       status = "okay";
+};
+
+&i2c0 {
+       dtt@50 {
+               compatible = "at,24c1024";
+               reg = <0x50>;
+       };
+};
+
+&aemif {
+       cs0 {
+               #address-cells = <2>;
+               #size-cells = <1>;
+               clock-ranges;
+               ranges;
+
+               ti,cs-chipselect = <0>;
+               /* all timings in nanoseconds */
+               ti,cs-min-turnaround-ns = <12>;
+               ti,cs-read-hold-ns = <6>;
+               ti,cs-read-strobe-ns = <23>;
+               ti,cs-read-setup-ns = <9>;
+               ti,cs-write-hold-ns = <8>;
+               ti,cs-write-strobe-ns = <23>;
+               ti,cs-write-setup-ns = <8>;
+
+               nand@0,0 {
+                       compatible = "ti,keystone-nand","ti,davinci-nand";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0 0 0x4000000
+                              1 0 0x0000100>;
+
+                       ti,davinci-chipselect = <0>;
+                       ti,davinci-mask-ale = <0x2000>;
+                       ti,davinci-mask-cle = <0x4000>;
+                       ti,davinci-mask-chipsel = <0>;
+                       nand-ecc-mode = "hw";
+                       ti,davinci-ecc-bits = <4>;
+                       nand-on-flash-bbt;
+
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x100000>;
+                               read-only;
+                       };
+
+                       partition@100000 {
+                               label = "params";
+                               reg = <0x100000 0x80000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "ubifs";
+                               reg = <0x180000 0x7FE80000>;
+                       };
+               };
+       };
+};
+
+&spi0 {
+       nor_flash: n25q128a11@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "Micron,n25q128a11";
+               spi-max-frequency = <54000000>;
+               m25p,fast-read;
+               reg = <0>;
+
+               partition@0 {
+                       label = "u-boot-spl";
+                       reg = <0x0 0x80000>;
+                       read-only;
+               };
+
+               partition@1 {
+                       label = "misc";
+                       reg = <0x80000 0xf80000>;
+               };
+       };
+};
+
+&mdio {
+       status = "ok";
+       ethphy0: ethernet-phy@0 {
+               compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
+               reg = <0>;
+       };
+
+       ethphy1: ethernet-phy@1 {
+               compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};
diff --git a/arch/arm/dts/k2l-netcp.dtsi b/arch/arm/dts/k2l-netcp.dtsi
new file mode 100644 (file)
index 0000000..6b95284
--- /dev/null
@@ -0,0 +1,189 @@
+/*
+ * Device Tree Source for Keystone 2 Lamarr Netcp driver
+ *
+ * Copyright 2015 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+qmss: qmss@2a40000 {
+       compatible = "ti,keystone-navigator-qmss";
+       dma-coherent;
+       #address-cells = <1>;
+       #size-cells = <1>;
+       clocks = <&chipclk13>;
+       ranges;
+       queue-range     = <0 0x2000>;
+       linkram0        = <0x100000 0x4000>;
+       linkram1        = <0x70000000 0x10000>; /* 1MB OSR mem */
+
+       qmgrs {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               qmgr0 {
+                       managed-queues = <0 0x2000>;
+                       reg = <0x2a40000 0x20000>,
+                             <0x2a06000 0x400>,
+                             <0x2a02000 0x1000>,
+                             <0x2a03000 0x1000>,
+                             <0x23a80000 0x20000>,
+                             <0x2a80000 0x20000>;
+                       reg-names = "peek", "status", "config",
+                                   "region", "push", "pop";
+               };
+       };
+       queue-pools {
+               qpend {
+                       qpend-0 {
+                               qrange = <658 8>;
+                               interrupts =<0 40 0xf04 0 41 0xf04 0 42 0xf04
+                                            0 43 0xf04 0 44 0xf04 0 45 0xf04
+                                            0 46 0xf04 0 47 0xf04>;
+                       };
+                       qpend-1 {
+                               qrange = <528 16>;
+                               interrupts = <0 48 0xf04 0 49 0xf04 0 50 0xf04
+                                             0 51 0xf04 0 52 0xf04 0 53 0xf04
+                                             0 54 0xf04 0 55 0xf04 0 56 0xf04
+                                             0 57 0xf04 0 58 0xf04 0 59 0xf04
+                                             0 60 0xf04 0 61 0xf04 0 62 0xf04
+                                             0 63 0xf04>;
+                               qalloc-by-id;
+                       };
+                       qpend-2 {
+                               qrange = <544 16>;
+                               interrupts = <0 64 0xf04 0 65 0xf04 0 66 0xf04
+                                             0 59 0xf04 0 68 0xf04 0 69 0xf04
+                                             0 70 0xf04 0 71 0xf04 0 72 0xf04
+                                             0 73 0xf04 0 74 0xf04 0 75 0xf04
+                                             0 76 0xf04 0 77 0xf04 0 78 0xf04
+                                             0 79 0xf04>;
+                       };
+               };
+               general-purpose {
+                       gp-0 {
+                               qrange = <4000 64>;
+                       };
+                       netcp-tx {
+                               qrange = <896 128>;
+                               qalloc-by-id;
+                       };
+               };
+       };
+       descriptor-regions {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               region-12 {
+                       id = <12>;
+                       region-spec = <8192 128>;       /* num_desc desc_size */
+                       link-index = <0x4000>;
+               };
+       };
+}; /* qmss */
+
+knav_dmas: knav_dmas@0 {
+       compatible = "ti,keystone-navigator-dma";
+       clocks = <&papllclk>;
+       #address-cells = <1>;
+       #size-cells = <1>;
+       ranges;
+       ti,navigator-cloud-address = <0x23a80000 0x23a90000>;
+
+       dma_gbe: dma_gbe@0 {
+               reg = <0x26186000 0x100>,
+                         <0x26187000 0x2a0>,
+                         <0x26188000 0xb60>,
+                         <0x26186100 0x80>,
+                         <0x26189000 0x1000>;
+               reg-names = "global", "txchan", "rxchan",
+                               "txsched", "rxflow";
+       };
+};
+
+netcp: netcp@26000000 {
+       reg = <0x2620110 0x8>;
+       reg-names = "efuse";
+       compatible = "ti,netcp-1.0";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       /* NetCP address range */
+       ranges = <0 0x26000000 0x1000000>;
+
+       clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
+       dma-coherent;
+
+       ti,navigator-dmas = <&dma_gbe 0>,
+                       <&dma_gbe 8>,
+                       <&dma_gbe 0>;
+       ti,navigator-dma-names = "netrx0", "netrx1", "nettx";
+
+       netcp-devices {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               gbe@200000 { /* ETHSS */
+                       label = "netcp-gbe";
+                       compatible = "ti,netcp-gbe-5";
+                       reg = <0x200000 0x900>, <0x220000 0x20000>;
+                       /* enable-ale; */
+                       tx-queue = <896>;
+                       tx-channel = "nettx";
+
+                       interfaces {
+                               gbe0: interface-0 {
+                                       slave-port = <0>;
+                                       link-interface  = <1>;
+                                       phy-handle      = <&ethphy0>;
+                               };
+                               gbe1: interface-1 {
+                                       slave-port = <1>;
+                                       link-interface  = <1>;
+                                       phy-handle      = <&ethphy1>;
+                               };
+                       };
+
+                       secondary-slave-ports {
+                               port-2 {
+                                       slave-port = <2>;
+                                       link-interface  = <2>;
+                               };
+                               port-3 {
+                                       slave-port = <3>;
+                                       link-interface  = <2>;
+                               };
+                       };
+               };
+       };
+
+       netcp-interfaces {
+               interface-0 {
+                       rx-channel = "netrx0";
+                       rx-pool = <1024 12>;
+                       tx-pool = <1024 12>;
+                       rx-queue-depth = <128 128 0 0>;
+                       rx-buffer-size = <1518 4096 0 0>;
+                       rx-queue = <528>;
+                       tx-completion-queue = <530>;
+                       efuse-mac = <1>;
+                       netcp-gbe = <&gbe0>;
+
+               };
+               interface-1 {
+                       rx-channel = "netrx1";
+                       rx-pool = <1024 12>;
+                       tx-pool = <1024 12>;
+                       rx-queue-depth = <128 128 0 0>;
+                       rx-buffer-size = <1518 4096 0 0>;
+                       rx-queue = <529>;
+                       tx-completion-queue = <531>;
+                       efuse-mac = <0>;
+                       local-mac-address = [02 18 31 7e 3e 7f];
+                       netcp-gbe = <&gbe1>;
+               };
+       };
+};
diff --git a/arch/arm/dts/k2l.dtsi b/arch/arm/dts/k2l.dtsi
new file mode 100644 (file)
index 0000000..49fd414
--- /dev/null
@@ -0,0 +1,108 @@
+/*
+ * Copyright 2014 Texas Instruments, Inc.
+ *
+ * Keystone 2 Lamarr SoC specific device tree
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               interrupt-parent = <&gic>;
+
+               cpu@0 {
+                       compatible = "arm,cortex-a15";
+                       device_type = "cpu";
+                       reg = <0>;
+               };
+
+               cpu@1 {
+                       compatible = "arm,cortex-a15";
+                       device_type = "cpu";
+                       reg = <1>;
+               };
+       };
+
+       soc {
+               /include/ "k2l-clocks.dtsi"
+
+               uart2: serial@02348400 {
+                       compatible = "ns16550a";
+                       current-speed = <115200>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       reg = <0x02348400 0x100>;
+                       clocks  = <&clkuart2>;
+                       interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>;
+               };
+
+               uart3:  serial@02348800 {
+                       compatible = "ns16550a";
+                       current-speed = <115200>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       reg = <0x02348800 0x100>;
+                       clocks  = <&clkuart3>;
+                       interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
+               };
+
+               dspgpio0: keystone_dsp_gpio@02620240 {
+                       compatible = "ti,keystone-dsp-gpio";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio,syscon-dev = <&devctrl 0x240>;
+               };
+
+               dspgpio1: keystone_dsp_gpio@2620244 {
+                       compatible = "ti,keystone-dsp-gpio";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio,syscon-dev = <&devctrl 0x244>;
+               };
+
+               dspgpio2: keystone_dsp_gpio@2620248 {
+                       compatible = "ti,keystone-dsp-gpio";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio,syscon-dev = <&devctrl 0x248>;
+               };
+
+               dspgpio3: keystone_dsp_gpio@262024c {
+                       compatible = "ti,keystone-dsp-gpio";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio,syscon-dev = <&devctrl 0x24c>;
+               };
+
+               mdio: mdio@26200f00 {
+                       compatible      = "ti,keystone_mdio", "ti,davinci_mdio";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x26200f00 0x100>;
+                       status = "disabled";
+                       clocks = <&clkcpgmac>;
+                       clock-names = "fck";
+                       bus_freq        = <2500000>;
+               };
+               /include/ "k2l-netcp.dtsi"
+       };
+};
+
+&spi0 {
+       ti,davinci-spi-num-cs = <5>;
+};
+
+&spi1 {
+       ti,davinci-spi-num-cs = <3>;
+};
+
+&spi2 {
+       ti,davinci-spi-num-cs = <5>;
+       /* Pin muxed. Enabled and configured by Bootloader */
+       status = "disabled";
+};
index 8d6bdbd19ac645e4f5acc8e69d2e5dfdb6808c92..47fcad347991b4ac9dbd3b6dc3610a1f5d8322cb 100644 (file)
@@ -1,9 +1,13 @@
 CONFIG_ARM=y
 CONFIG_ARCH_KEYSTONE=y
 CONFIG_TARGET_K2L_EVM=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEFAULT_DEVICE_TREE="k2l-evm"
 CONFIG_SPL=y
 CONFIG_SYS_PROMPT="K2L EVM # "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
 CONFIG_SPI_FLASH=y