]> git.sur5r.net Git - u-boot/commitdiff
serial: s5p: use clock api to get clock rate
authorThomas Abraham <thomas.ab@samsung.com>
Sat, 23 Apr 2016 16:48:11 +0000 (22:18 +0530)
committerMinkyu Kang <mk7.kang@samsung.com>
Wed, 25 May 2016 01:00:19 +0000 (10:00 +0900)
On Exynos platforms that support clock driver API, allow the driver to
use clock api get the SCLK clock rate.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
drivers/serial/serial_s5p.c

index 8590dfd418a34d3588a766cc15e2bddf9119ab29..cb55c5ab7196a38b783b1ff9934ee22999cceb2b 100644 (file)
@@ -17,6 +17,7 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/uart.h>
 #include <serial.h>
+#include <clk.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -90,7 +91,19 @@ int s5p_serial_setbrg(struct udevice *dev, int baudrate)
 {
        struct s5p_serial_platdata *plat = dev->platdata;
        struct s5p_uart *const uart = plat->reg;
-       u32 uclk = get_uart_clk(plat->port_id);
+       u32 uclk;
+
+#ifdef CONFIG_CLK_EXYNOS
+       struct udevice *clk_dev;
+       u32 ret;
+
+       ret = clk_get_by_index(dev, 1, &clk_dev);
+       if (ret < 0)
+               return ret;
+       uclk = clk_get_periph_rate(clk_dev, ret);
+#else
+       uclk = get_uart_clk(plat->port_id);
+#endif
 
        s5p_serial_baud(uart, uclk, baudrate);