/* deassert reset */
tmp = readl(SC_RSTCTRL);
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_RSTCTRL_NRST_ETHER;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;
#endif
/* provide clocks */
tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_CLKCTRL_CEN_ETHER;
-#endif
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
SC_RSTCTRL_NRST_GIO;
#endif
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_RSTCTRL_NRST_ETHER;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;
#endif
tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
SC_CLKCTRL_CEN_GIO;
#endif
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_CLKCTRL_CEN_ETHER;
-#endif
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
#ifdef CONFIG_USB_DWC3_UNIPHIER
tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
#endif
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_RSTCTRL_NRST_ETHER;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;
#endif
tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
SC_CLKCTRL_CEN_GIO;
#endif
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_CLKCTRL_CEN_ETHER;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif