Changes since U-Boot 1.1.4:
======================================================================
+ * Add initial support for PCI-Express on PPC440SPe (Yucca board).
+
+* Fix compiler warning for TRAB board.
+ Patch by Martin Krause, 07 Aug 2006
+
+* Prevent USB commands from working when USB is stopped.
+
+* Add rudimentary handling of alternate settings of USB interfaces.
+ This is in order to fix issues with some USB sticks timing out
+ during initialization. Some code readability improvements.
+
+* PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance
+ AMCC suggested to set the PMU bit to 0 for best performace on
+ the PPC440 DDR controller.
+ Please see doc/README.440-DDR-performance for details.
+ Patch by Stefan Roese, 28 Jul 2006
+
+* AMCC bamboo (440EP) U-Boot image reduced to 384kbyte
+ Please see doc/README.bamboo for details.
+ Patch by Stefan Roese, 27 Jul 2006
+
+* Fix CONFIG_CMDLINE_EDITING implementation
+ Patch by Stefan Roese, 27 Jul 2006
+
+* Fix preboot message on TQM5200 after switching to hush parser.
+
+* MCC200: set default configuration to low_boot DDR,
+ and support for configurable options high_boot and/or SDRAM.
+
+* Add support for 256 MB SDRAM on CPU87
+ Patch by Josef Wagner, 25 Nov 2005
+
+* Add configuration for cam5200 board (based on TQM5200S).
+
+* More code cleanup
+
+* Disabled kvme080 board in MAKEALL because of build problems.
+
+* Code cleanup
+
+* Update NetStar board
+ Patch by Ladislav Michl, 03 Nov 2005
+
+* Make code better readable.
+ Patch by Ladislav Michl, 14 Sep 2005
+
+* Enable initrd ATAG for xm250 board.
+ Patch by Josef Wagner, 05 Sep 2005
+
+* Add readline cmdline-editing extension
+ Patch by JinHua Luo, 01 Sep 2005
+
+* Add support for friendly-arm SBC-2410X board
+ Patch by JinHua Luo, 01 Sep 2005
+
+* Fix multi-part image support on i386 platform.
+ Patch by David Updegraff, 19 Aug 2005
+
+* Add support for KVME080 board
+ Patch by Sangmoon Kim, 18 Aug 2005
+
+* Fix MIPS LE build problem
+ Patch by Matej Kupljen, 10 Aug 2005
+
+* Check argument count in "mii" command.
+ Problem pointed out by Andrew Dyer, 13 Jun 2005
+
+* Cleanup TQM5200 board configurations:
+ - make highboot configurations use environment at high end, too,
+ to avoid flash fragmentation
+ - always use redundand environment
+ - don't enable video code for modules without graphics controller
+ - provide useful (though different) mtdparts settings
+ - get rid of CONFIG_CS_AUTOCONF which was always set anyway
+
+* Extend mkconfig tool to print more useful target name
+
+* Add support for high-boot on TQM5200 and TQM5200S boards.
+ Hint: the CPLD on the TQM5200 must be programmed with a software
+ version supporting the high boot option! The new TQM5200S is
+ already supporting this option. On the TQM5200 this option will be
+ supported in configurations with MPC5200 rev B processors.
+ To actually "high boot", set jumper X30 on the STK52xx.
+ Patch by Martin Krause, 12 Jul 2006
+
+* Add support for new TQM5200 revisions
+ - Support for TQM5200S (short version without graphic controller)
+ - Support for modules with 'N' type S29GL128N Spansion flashes
+ (requires changes to flash layout)
+ - Support for MPC5200B cpu (mostly support for second SDRAM bank)
+ Patch by Martin Krause, 07 Jul 2006
+
+* Fix support for PS/2 keyboard on TQM85xx boards
+ The PS/2 keyobard driver for the TQM85xx modules only supports the
+ internal DUART of the MPC85xx CPU. Since the MPC8560 doesn't
+ include a DUART, the TQM8560 modules can't be used with the PS/2
+ keyboard controller on the STK85xx board.
+ The PS/2 keyboard driver should work with the modules TQM8540,
+ TQM8541 and TQM8555, but it only has been tested on a TQM8540, yet.
+ Make sure the PS/2 controller on the STK85xx is programmed. Jumper
+ settings: X66 1-2, 9-10; X61 2-3
+ Patch by Martin Krause, 21 Jun 2006
+
+* Adjust RTC century handling on STK52xx board to match Linux driver.
+ Patch by Martin Krause, 12 Jun 2006
+
+* Adjust filenames for USB update images on TRAB board.
+ During an automatic update via USB stick, U-Boot searches for
+ images with the name "firmware.img" and "kernel.img". This names
+ are now changed to "firmw_01.img" and "kernl_01.img". This is done,
+ to prevent updates of new boards (with the new macronics "c" step
+ flashes) with old, incompatible firmware or kernel versions.
+ Patch by Martin Krause, 21 Jun 2006
+
+* Bugfix in VFD routine on TRAB board.
+ Make sure upper lext pixel can be set to blue, too
+ (so far only red was possible).
+ Patch by Martin Krause, 15 Feb 2006
+
+* Enable buffered flash writes for TB5200 board.
+
+* Fix some bugs in TRAB board flash driver.
+ - increase CFG_FLASH_ERASE_TOUT from 2 to 15 seconds
+ - use CFG_FLASH_WRITE_TOUT for programming instead of CFG_FLASH_ERASE_TOUT
+ - remove "Unlock Bypass" mode, because macronix flashes do not support
+ this mode officially
+ - fix flash reset command from 0x00FF to 0x00F0. 0x00FF is only specified
+ for Intel compatible flashes, not for AMD compatible.
+ Patch by Martin Krause, 15 Feb 2006
+
+* Add additional error messages to flash driver on TRAB board
+ (for erase errors and timeout errors)
+ Patch by Martin Krause, 14 Feb 2006
+
+* Add support for TB5200 board
+ The TB5200 ("Tinybox") is a small baseboard for the TQM5200 module
+ integrated in a little aluminium case.
+ Patch by Martin Krause, 8 Jun 2006
+
+* Enable buffered flash writes for TQM5200 board.
+
+* Fix problems with SanDisk Corporation Cruzer Micro USB memory stick.
+
+* Add support for TQM885D board.
+ Patch by Martin Krause, 20 Mar 2006
+
+* Fix FEC initialisation: All MII configuration is done via FEC1
+ registers, but MII_SPEED was configured according to FEC used. So
+ if only FEC2 was used, this caused the real MII_SPEED register in
+ FEC1 to stay uninitalised, leqading to "mii_send STUCK!" messages.
+ Fix: always configure MII_SPEED on FEC1 only.
+ Patch by Markus Klotzbuecher, 12 Jul 2006
+
+* Add support for SPC1920 board.
+ Patch by Markus Klotzbuecher, 12 Jul 2006
+
+* MCC200 board: support console on any one of the Quad UART ports.
+
+* Fix error in flash protection calculation on MCC200 board.
+
+* Major PCMCIA Cleanup to make code better readable and maintainable.
+ Notes:
+ - Board-dependend code for RPXLITE and RPXCLASSIC-based boards
+ placed to the drivers/rpx_pmcia.c file to avoid duplication.
+ Same for TQM8xx-based boards (drivers/tqm8xx_pmcia.c).
+ - drivers/i82365.c has been split into two parts located at
+ board/atc/ti113x.c and board/cpc45/pd67290.c (ATC and CPC45 are
+ the only boards using CONFIG_82365).
+ - Changes were tested for clean build and *very* *few* boards.
+
* Fix timer problems on AMCC yucca board.
Set Timer Clock Select to use CPU clock as a timer input source.
*************************************************************************/
.section .bootpg,"ax"
- .globl tlbtab
- tlbtab:
+ /**************************************************************************
+ * TLB table for revA
+ *************************************************************************/
+ .globl tlbtabA
+ tlbtabA:
+ tlbtab_start
+ tlbentry(0xfff00000, SZ_16M, 0xfff00000, 4, AC_R|AC_W|AC_X|SA_G)
+
+ tlbentry(CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
+ tlbentry(CFG_SDRAM_BASE + 0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
+ tlbentry(CFG_SDRAM_BASE + 0x20000000, SZ_256M, 0x20000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
+ tlbentry(CFG_SDRAM_BASE + 0x30000000, SZ_256M, 0x30000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
+
+ tlbentry(CFG_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_R|AC_W|AC_X|SA_I)
+ tlbentry(CFG_FPGA_BASE, SZ_1K, 0xE2000000, 4,AC_R|AC_W|SA_I)
+
+ tlbentry(CFG_OPER_FLASH, SZ_16M, 0xE7000000, 4,AC_R|AC_W|AC_X|SA_G|SA_I)
+ tlbentry(CFG_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_R|AC_W|SA_G|SA_I)
+
+ tlbentry(CFG_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I)
+
+ tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE2_CFGBASE, SZ_16M, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE0_XCFGBASE, SZ_4K, 0x50000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE1_XCFGBASE, SZ_4K, 0x90000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE2_XCFGBASE, SZ_4K, 0xD0000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+
+ tlbentry(CFG_PCIE1_REGBASE, SZ_1K, 0x60000400, 0xD, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE3_REGBASE, SZ_1K, 0x60001400, 0xD, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE5_REGBASE, SZ_1K, 0x60002400, 0xD, AC_R|AC_W|SA_G|SA_I)
+ tlbtab_end
+
+ /**************************************************************************
+ * TLB table for revB
+ *
- * Notice: revB of the 440SPe chip is very strict about PLB real addressess
++ * Notice: revB of the 440SPe chip is very strict about PLB real addresses
+ * and ranges to be mapped for config space: it seems to only work with
+ * d_nnnn_nnnn range (hangs the core upon config transaction attempts when
+ * set otherwise) while revA uses c_nnnn_nnnn.
+ *************************************************************************/
+ .globl tlbtabB
+ tlbtabB:
tlbtab_start
tlbentry(0xfff00000, SZ_16M, 0xfff00000, 4, AC_R|AC_W|AC_X|SA_G)