]> git.sur5r.net Git - u-boot/commitdiff
Revert "mx6: ddr: Allow changing REFSEL and REFR fields"
authorMaxim Yu. Osipov <mosipov@ilbers.de>
Tue, 20 Feb 2018 10:08:09 +0000 (11:08 +0100)
committerStefano Babic <sbabic@denx.de>
Thu, 22 Feb 2018 13:30:53 +0000 (14:30 +0100)
This reverts commit edf0093732225c2fd0791c3864e9a3eef1f92f19 for
cm_fx6 iMX.6 Solo module as it causes frequent (around 10 percent of
power cycles) board's hangs.

These hangs happen in SPL when BSS is being initialized in SDRAM -
it appear that variables from BSS contain trash values which lead to board
hangs. Looks like that SDRAM doesn't yet finish initialization in these
cases.

Signed-off-by: Maxim Yu. Osipov <mosipov@ilbers.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
board/compulab/cm_fx6/spl.c

index 56aac60239cfabceb7f19b77956fca82f7417743..16e5bf8dfa2332e97ec893cf65bbc616ce12ceb9 100644 (file)
@@ -107,8 +107,6 @@ static struct mx6_ddr_sysinfo cm_fx6_sysinfo_s = {
        .mif3_mode      = 3,
        .rst_to_cke     = 0x23,
        .sde_to_rst     = 0x10,
-       .refsel = 1,            /* Refresh cycles at 32KHz */
-       .refr = 7,              /* 8 refresh commands per refresh cycle */
 };
 
 static struct mx6_ddr3_cfg cm_fx6_ddr3_cfg_s = {