mpc83xx: spd_sdram: fix ddr sdram base address assignment bug

The spd_dram code shifts the base address, then masks 20 bits, but
forgets to shift the base address back. Fix this by just masking the
base address correctly.

Found this bug while trying to relocate a DDR memory at the base != 0.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
index 3a6347fe1a5533ae38ada6af28dcd16677b28e99..128cd40575d381cd5eb896a7cda8fb01c02571e4 100644 (file)
--- a/board/freescale/mpc8313erdb/sdram.c
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -64,7 +64,7 @@ static long fixed_sdram(void)
        volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
        u32 msize_log2 = __ilog2(msize);
 
-       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
        im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;
 

diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c
index 07e6486eeac019a115b8708be03e127022669f4e..3714c2c2eff4095818ec99d86588e0a056a1208c 100644 (file)
--- a/board/freescale/mpc8315erdb/sdram.c
+++ b/board/freescale/mpc8315erdb/sdram.c
@@ -60,7 +60,7 @@ static long fixed_sdram(void)
        u32 msize = CFG_DDR_SIZE * 1024 * 1024;
        u32 msize_log2 = __ilog2(msize);
 
-       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE  & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
        im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;
 

diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 4c04f2c4dda1f46aeb56de255bc731fe62f92f12..ef947feda1dae63afb7a3a2845ff3d21c2ef275e 100644 (file)
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -109,7 +109,7 @@ int fixed_sdram(void)
                        return -1;
                }
        }
-       im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
 
 #if (CFG_DDR_SIZE != 256)

diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index d3fc560df3586f6c5465741ebaa8d196287ccbcd..0a20e2bba4019d215e7c92ebf34abe7b18ca5154 100644 (file)
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -55,7 +55,7 @@ int fixed_sdram(void)
 
        im->sysconf.ddrlaw[0].ar =
            LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-       im->sysconf.ddrlaw[0].bar = (CFG_DDR_SDRAM_BASE >> 12) & 0xfffff;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 
        /* Only one CS0 for DDR */
        im->ddr.csbnds[0].csbnds = 0x0000000f;

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 40f1e63281d5a2992da2f349eeb4bd43e1e3eb4b..8003ec1d973ebd3011f8134276c6892b3ccded2c 100644 (file)
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -108,7 +108,7 @@ int fixed_sdram(void)
        u32 msize = CFG_DDR_SIZE * 1024 * 1024;
        u32 msize_log2 = __ilog2(msize);
 
-       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
 
 #if (CFG_DDR_SIZE != 512)

diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index aaefc189913e4bb4c29238bcfd72ad59014ca652..e547b51e3065edd14bbe456997e5ebe35f1d0560 100644 (file)
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -96,7 +96,7 @@ int fixed_sdram(void)
        u32 msize = CFG_DDR_SIZE * 1024 * 1024;
        u32 msize_log2 = __ilog2(msize);
 
-       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
 
        im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;

diff --git a/board/matrix_vision/mvblm7/mvblm7.c b/board/matrix_vision/mvblm7/mvblm7.c
index b07f91393c2acf589c35069ee1de41c91b842e86..3dcff676f2587faedf3bc2404bde376da0c543f7 100644 (file)
--- a/board/matrix_vision/mvblm7/mvblm7.c
+++ b/board/matrix_vision/mvblm7/mvblm7.c
@@ -50,7 +50,7 @@ int fixed_sdram(void)
                if (ddr_size & 1)
                        return -1;
        }
-       im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) &
                LAWAR_SIZE);
 

diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c
index 4a44fda31e917711ff1cb828df3dd125fe58f192..93ada0b5b47d5273361fc7ccc2505594b40bea8b 100644 (file)
--- a/board/sbc8349/sbc8349.c
+++ b/board/sbc8349/sbc8349.c
@@ -101,7 +101,7 @@ int fixed_sdram(void)
                        return -1;
                }
        }
-       im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
 
 #if (CFG_DDR_SIZE != 256)

diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 76f2474491a7b36441d5608e8bff64b95f62996b..f4a0e9001286803ac43fddc5c15b78a655769425 100644 (file)
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -274,7 +274,7 @@ long int spd_sdram()
        /*
         * Set up LAWBAR for all of DDR.
         */
-       ecm->bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+       ecm->bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        ecm->ar  = (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & law_size));
        debug("DDR:bar=0x%08x\n", ecm->bar);
        debug("DDR:ar=0x%08x\n", ecm->ar);