fsl_ddr: Move DDR config options to driver Kconfig

Create driver/ddr/fsl/Kconfig and move existing options. Clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s]
Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 698370becfe500300b0b31db1d4402136025f128..52a9f39c636ce870a504e6d01d4d2d8dcce6c6e5 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -770,6 +770,7 @@ config TARGET_LS1021AQDS
        select ARCH_LS1021A
        select ARCH_SUPPORT_PSCI
        select LS1_DEEP_SLEEP
+       select SYS_FSL_DDR
 
 config TARGET_LS1021ATWR
        bool "Support ls1021atwr"

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index d154f7b0f68c8b4d9066e2bef326b1a4c483b3d8..eca1d06ca5dcbfc68298c2e08817c034174467fc 100644 (file)
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -3,8 +3,10 @@ config ARCH_LS1021A
        select SYS_FSL_ERRATUM_A010315
        select SYS_FSL_SRDS_1
        select SYS_HAS_SERDES
-       select SYS_FSL_DDR_BE
-       select SYS_FSL_DDR_VER_50
+       select SYS_FSL_DDR_BE if SYS_FSL_DDR
+       select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
+       select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR
+       select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_COMPAT_5
        select SYS_FSL_SEC_LE
@@ -49,47 +51,6 @@ config SYS_FSL_SRDS_2
 config SYS_HAS_SERDES
        bool
 
-config SYS_FSL_DDR
-       bool "Freescale DDR driver"
-       help
-         Select Freescale General DDR driver, shared between most Freescale
-         PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM-
-         based Layerscape SoCs (such as ls2080a).
-
-config SYS_FSL_DDR_BE
-       bool
-       default y
-       help
-         Access DDR registers in big-endian.
-
-config SYS_FSL_DDR_VER
-       int
-       default 50 if SYS_FSL_DDR_VER_50
-
-config SYS_FSL_DDR_VER_50
-       bool
-
-config SYS_FSL_DDRC_ARM_GEN3
-       bool
-
-config SYS_FSL_DDRC_GEN4
-       bool
-
-config SYS_FSL_DDR3
-       bool "Freescale DDR3 controller"
-       depends on !SYS_FSL_DDR4
-       select SYS_FSL_DDR
-       select SYS_FSL_DDRC_ARM_GEN3
-       help
-         Enable Freescale DDR3 controller on ARM-based SoCs.
-
-config SYS_FSL_DDR4
-       bool "Freescale DDR4 controller"
-       select SYS_FSL_DDR
-       select SYS_FSL_DDRC_GEN4
-       help
-         Enable Freescale DDR4 controller.
-
 config SYS_FSL_IFC_BANK_COUNT
        int "Maximum banks of Integrated flash controller"
        depends on ARCH_LS1021A

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index a1f781edb74823f49bccc82b12baad5eced61b52..bee7d1537cb495e3da4118c39998f623e2bf3cce 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -8,28 +8,33 @@ config ARCH_LS1012A
 config ARCH_LS1043A
        bool
        select FSL_LSCH2
+       select SYS_FSL_DDR
        select SYS_FSL_DDR_BE
        select SYS_FSL_DDR_VER_50
        select SYS_FSL_ERRATUM_A010315
        select SYS_FSL_ERRATUM_A010539
+       select SYS_FSL_HAS_DDR3
+       select SYS_FSL_HAS_DDR4
 
 config ARCH_LS1046A
        bool
        select FSL_LSCH2
+       select SYS_FSL_DDR
        select SYS_FSL_DDR_BE
-       select SYS_FSL_DDR4
        select SYS_FSL_DDR_VER_50
        select SYS_FSL_ERRATUM_A010539
+       select SYS_FSL_HAS_DDR4
        select SYS_FSL_SRDS_2
 
 config ARCH_LS2080A
        bool
        select FSL_LSCH3
-       select SYS_FSL_DDR4
+       select SYS_FSL_DDR
        select SYS_FSL_DDR_LE
        select SYS_FSL_DDR_VER_50
        select SYS_FSL_HAS_DP_DDR
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_HAS_DDR4
        select SYS_FSL_SEC_COMPAT_5
        select SYS_FSL_SEC_LE
        select SYS_FSL_SRDS_2
@@ -71,9 +76,6 @@ config FSL_PPA_ARMV8_PSCI
          implemented under the common ARMv8 PSCI framework.
 endmenu
 
-config SYS_FSL_MMDC
-       bool
-
 config SYS_FSL_ERRATUM_A010315
        bool "Workaround for PCIe erratum A010315"
 
@@ -129,49 +131,4 @@ config SYS_FSL_SRDS_2
 config SYS_HAS_SERDES
        bool
 
-config SYS_FSL_DDR
-       bool "Freescale DDR driver"
-       help
-         Select Freescale General DDR driver, shared between most Freescale
-         PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM-
-         based Layerscape SoCs (such as ls2080a).
-
-config SYS_FSL_DDR_BE
-       bool
-       help
-         Access DDR registers in big-endian.
-
-config SYS_FSL_DDR_LE
-       bool
-       help
-         Access DDR registers in little-endian.
-
-config SYS_FSL_DDR_VER
-       int
-       default 50 if SYS_FSL_DDR_VER_50
-
-config SYS_FSL_DDR_VER_50
-       bool
-
-config SYS_FSL_DDRC_ARM_GEN3
-       bool
-
-config SYS_FSL_DDRC_GEN4
-       bool
-
-config SYS_FSL_DDR3
-       bool "Freescale DDR3 controller"
-       depends on !SYS_FSL_DDR4
-       select SYS_FSL_DDR
-       select SYS_FSL_DDRC_ARM_GEN3
-       help
-         Enable Freescale DDR3 controller on ARM-based SoCs.
-
-config SYS_FSL_DDR4
-       bool "Freescale DDR4 controller"
-       select SYS_FSL_DDR
-       select SYS_FSL_DDRC_GEN4
-       help
-         Enable Freescale DDR4 controller.
-
 endmenu

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 29fc33d4de6f792ceb41952855c552abcd3e5b62..db40669e67f3fd5a43b806023671397d857a9205 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -175,11 +175,11 @@
 #define CONFIG_SYS_FSL_ERRATUM_A009942
 #define CONFIG_SYS_FSL_ERRATUM_A009660
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
-#elif defined(CONFIG_ARCH_LS1012A)
-#undef CONFIG_SYS_FSL_DDRC_ARM_GEN3
 
+#elif defined(CONFIG_ARCH_LS1012A)
 #define GICD_BASE              0x01401000
 #define GICC_BASE              0x01402000
+
 #elif defined(CONFIG_ARCH_LS1046A)
 #define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_NUM_FMAN                    1

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 853e2656fa7e41584a4a3f575ca6ab055bc2bd17..0033c3526175244e5476083d9feea39ac7f875c2 100644 (file)
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -30,9 +30,13 @@ config MPC83xx
 config MPC85xx
        bool "MPC85xx"
        select CREATE_ARCH_SYMLINK
+       select SYS_FSL_DDR
+       select SYS_FSL_DDR_BE
 
 config MPC86xx
        bool "MPC86xx"
+       select SYS_FSL_DDR
+       select SYS_FSL_DDR_BE
 
 config 8xx
        bool "MPC8xx"

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 3ea62caada7d9021f45bdb4fefe037a24088497a..6e4a93172fa471167e2ab09722174d5343564815 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -38,6 +38,9 @@ config TARGET_MPC832XEMDS
 
 config TARGET_MPC8349EMDS
        bool "Support MPC8349EMDS"
+       select SYS_FSL_DDR
+       select SYS_FSL_HAS_DDR2
+       select SYS_FSL_DDR_BE
 
 config TARGET_MPC8349ITX
        bool "Support MPC8349ITX"

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 7b000d727f219c3eda7a08f9788945cf6e3d7f2b..307a45d6c4ae286a7133d4a8866ca9a711fe1064 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -68,6 +68,8 @@ config TARGET_P5040DS
 config TARGET_MPC8536DS
        bool "Support MPC8536DS"
        select ARCH_MPC8536
+# Use DDR3 controller with DDR2 DIMMs on this board
+       select SYS_FSL_DDRC_GEN3
 
 config TARGET_MPC8540ADS
        bool "Support MPC8540ADS"
@@ -104,6 +106,8 @@ config TARGET_MPC8569MDS
 config TARGET_MPC8572DS
        bool "Support MPC8572DS"
        select ARCH_MPC8572
+# Use DDR3 controller with DDR2 DIMMs on this board
+       select SYS_FSL_DDRC_GEN3
 
 config TARGET_P1010RDB_PA
        bool "Support P1010RDB_PA"
@@ -300,6 +304,8 @@ config TARGET_XPEDITE520X
 config TARGET_XPEDITE537X
        bool "Support xpedite537x"
        select ARCH_MPC8572
+# Use DDR3 controller with DDR2 DIMMs on this board
+       select SYS_FSL_DDRC_GEN3
 
 config TARGET_XPEDITE550X
        bool "Support xpedite550x"
@@ -325,6 +331,7 @@ config ARCH_B4420
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -333,6 +340,7 @@ config ARCH_B4860
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -340,6 +348,7 @@ config ARCH_B4860
 config ARCH_BSC9131
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -347,6 +356,7 @@ config ARCH_BSC9131
 config ARCH_BSC9132
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -355,6 +365,7 @@ config ARCH_BSC9132
 config ARCH_C29X
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_6
@@ -363,6 +374,8 @@ config ARCH_C29X
 config ARCH_MPC8536
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR2
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -371,10 +384,12 @@ config ARCH_MPC8536
 config ARCH_MPC8540
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR1
 
 config ARCH_MPC8541
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR1
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -382,6 +397,7 @@ config ARCH_MPC8541
 config ARCH_MPC8544
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -390,6 +406,8 @@ config ARCH_MPC8544
 config ARCH_MPC8548
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR2
+       select SYS_FSL_HAS_DDR1
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -398,6 +416,7 @@ config ARCH_MPC8548
 config ARCH_MPC8555
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR1
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -405,10 +424,12 @@ config ARCH_MPC8555
 config ARCH_MPC8560
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR1
 
 config ARCH_MPC8568
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -416,6 +437,7 @@ config ARCH_MPC8568
 config ARCH_MPC8569
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -423,14 +445,17 @@ config ARCH_MPC8569
 config ARCH_MPC8572
        bool
        select FSL_LAW
-       select SYS_PPC_E500_USE_DEBUG_TLB
+       select SYS_FSL_HAS_DDR2
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
+       select SYS_PPC_E500_USE_DEBUG_TLB
 
 config ARCH_P1010
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -439,6 +464,7 @@ config ARCH_P1010
 config ARCH_P1011
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -447,6 +473,7 @@ config ARCH_P1011
 config ARCH_P1020
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -455,6 +482,7 @@ config ARCH_P1020
 config ARCH_P1021
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -463,6 +491,7 @@ config ARCH_P1021
 config ARCH_P1022
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -471,6 +500,7 @@ config ARCH_P1022
 config ARCH_P1023
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -478,6 +508,7 @@ config ARCH_P1023
 config ARCH_P1024
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -486,6 +517,7 @@ config ARCH_P1024
 config ARCH_P1025
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -494,6 +526,7 @@ config ARCH_P1025
 config ARCH_P2020
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_2
@@ -503,6 +536,7 @@ config ARCH_P2041
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -511,6 +545,7 @@ config ARCH_P3041
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -519,6 +554,7 @@ config ARCH_P4080
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -527,6 +563,7 @@ config ARCH_P5020
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -535,6 +572,7 @@ config ARCH_P5040
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -546,6 +584,8 @@ config ARCH_T1023
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
+       select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
@@ -554,6 +594,8 @@ config ARCH_T1024
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
+       select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
@@ -562,6 +604,8 @@ config ARCH_T1040
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
+       select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
@@ -570,6 +614,8 @@ config ARCH_T1042
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
+       select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
@@ -578,6 +624,7 @@ config ARCH_T2080
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -586,6 +633,7 @@ config ARCH_T2081
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -594,6 +642,7 @@ config ARCH_T4160
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
@@ -602,6 +651,7 @@ config ARCH_T4240
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4

diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig
index 11afffa83033e39412787a367e90befd13aa1391..ff21c4823b1a6e295f8645070b9d8789da55ed67 100644 (file)
--- a/arch/powerpc/cpu/mpc86xx/Kconfig
+++ b/arch/powerpc/cpu/mpc86xx/Kconfig
@@ -29,10 +29,14 @@ endchoice
 config ARCH_MPC8610
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR1
+       select SYS_FSL_HAS_DDR2
 
 config ARCH_MPC8641
        bool
        select FSL_LAW
+       select SYS_FSL_HAS_DDR1
+       select SYS_FSL_HAS_DDR2
 
 config FSL_LAW
        bool

diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index d4f05d1806acc0be9e5045c2711fd7c1030cb56a..55686a1abf1bfe5e961746ff226718e0186628c5 100644 (file)
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -9,16 +9,13 @@
 
 #ifdef CONFIG_MPC85xx
 #include <asm/config_mpc85xx.h>
-#define CONFIG_SYS_FSL_DDR
 #endif
 
 #ifdef CONFIG_MPC86xx
 #include <asm/config_mpc86xx.h>
-#define CONFIG_SYS_FSL_DDR
 #endif
 
 #ifdef CONFIG_MPC83xx
-#define CONFIG_SYS_FSL_DDR
 #endif
 
 #ifndef HWCONFIG_BUFFER_SIZE

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 4e9fcc84fea60f1566eec6d36e1c8f65886bcff6..6aee5bcca1b17a4f70e88bda1adc76d1b4db57ae 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -16,7 +16,6 @@
 #define CONFIG_PPC_SPINTABLE_COMPATIBLE
 
 #include <fsl_ddrc_version.h>
-#define CONFIG_SYS_FSL_DDR_BE
 
 /* IP endianness */
 #define CONFIG_SYS_FSL_IFC_BE
@@ -28,17 +27,13 @@
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 
 #elif defined(CONFIG_ARCH_MPC8540)
-#define CONFIG_SYS_FSL_DDRC_GEN1
 
 #elif defined(CONFIG_ARCH_MPC8541)
-#define CONFIG_SYS_FSL_DDRC_GEN1
 
 #elif defined(CONFIG_ARCH_MPC8544)
-#define CONFIG_SYS_FSL_DDRC_GEN2
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 
 #elif defined(CONFIG_ARCH_MPC8548)
-#define CONFIG_SYS_FSL_DDRC_GEN2
 #define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120
 #define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
 #define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
@@ -52,13 +47,10 @@
 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x00
 
 #elif defined(CONFIG_ARCH_MPC8555)
-#define CONFIG_SYS_FSL_DDRC_GEN1
 
 #elif defined(CONFIG_ARCH_MPC8560)
-#define CONFIG_SYS_FSL_DDRC_GEN1
 
 #elif defined(CONFIG_ARCH_MPC8568)
-#define CONFIG_SYS_FSL_DDRC_GEN2
 #define QE_MURAM_SIZE                  0x10000UL
 #define MAX_QE_RISC                    2
 #define QE_NUM_OF_SNUM                 28
@@ -544,9 +536,6 @@
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2  /* Freescale Chassis generation 2 */
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3         /* QMAN version 3 */
-#ifdef CONFIG_SYS_FSL_DDR4
-#define CONFIG_SYS_FSL_DDRC_GEN4
-#endif
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS   { 1, 1, 1, 1 }
 #define CONFIG_SYS_FSL_SRDS_1
@@ -588,9 +577,6 @@
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3  /* QMAN version 3 */
 #define CONFIG_SYS_FMAN_V3
-#ifdef CONFIG_SYS_FSL_DDR4
-#define CONFIG_SYS_FSL_DDRC_GEN4
-#endif
 #define CONFIG_SYS_FSL_NUM_CC_PLL      2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS  { 1, 1, 1, 1 }
 #define CONFIG_SYS_FSL_SRDS_1
@@ -697,13 +683,6 @@
 #define CONFIG_SYS_FSL_THREADS_PER_CORE 1
 #endif
 
-#if !defined(CONFIG_SYS_FSL_DDRC_GEN1) && \
-       !defined(CONFIG_SYS_FSL_DDRC_GEN2) && \
-       !defined(CONFIG_SYS_FSL_DDRC_GEN3) && \
-       !defined(CONFIG_SYS_FSL_DDRC_GEN4)
-#define CONFIG_SYS_FSL_DDRC_GEN3
-#endif
-
 #if !defined(CONFIG_ARCH_C29X)
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  1
 #endif

diff --git a/arch/powerpc/include/asm/config_mpc86xx.h b/arch/powerpc/include/asm/config_mpc86xx.h
index f053b9cf5ea7aa954e74f062510e4278f7069379..5eabe6df41c5af7afd424d2e60910c66f8f07656 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc86xx.h
+++ b/arch/powerpc/include/asm/config_mpc86xx.h
@@ -7,6 +7,4 @@
 #ifndef _ASM_MPC86xx_CONFIG_H_
 #define _ASM_MPC86xx_CONFIG_H_
 
-#define CONFIG_SYS_FSL_DDR_86XX
-
 #endif /* _ASM_MPC85xx_CONFIG_H_ */

diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig
index 3361dbc2aacced913e61b13822b5485efffcd824..bb975d24a774e7fd15496b92fa71dcdb0cdd0959 100644 (file)
--- a/configs/MPC8536DS_36BIT_defconfig
+++ b/configs/MPC8536DS_36BIT_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR2=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_NETDEVICES=y

diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig
index 2e84b3f723d6d7d230385f663944fab90c0d8830..59986aecf696addb7456e51a28591c3bf94076ba 100644 (file)
--- a/configs/MPC8536DS_SDCARD_defconfig
+++ b/configs/MPC8536DS_SDCARD_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR2=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_NETDEVICES=y

diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig
index 3ec85aced2a58f7b63a7d4484f4f8d00a2857301..83eb24dde76413fb5682dbf6daedaa380e744fa6 100644 (file)
--- a/configs/MPC8536DS_SPIFLASH_defconfig
+++ b/configs/MPC8536DS_SPIFLASH_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR2=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_NETDEVICES=y

diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig
index fd83da1b5e793f963689af4341aa498746f9d16c..9661a818d3ed022c2b57866dc76b0e15a3ab580b 100644 (file)
--- a/configs/MPC8536DS_defconfig
+++ b/configs/MPC8536DS_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR2=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_NETDEVICES=y

diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig
index b05496a1a9029d5e7df319f0a9fde1f4e1b66ec8..64210eb12aed16f9686cc95fdb7f8c801a03b87b 100644 (file)
--- a/configs/MPC8572DS_36BIT_defconfig
+++ b/configs/MPC8572DS_36BIT_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
+CONFIG_SYS_FSL_DDR2=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig
index 19d3d33ece735fe9ecd00f2e073109f1d5fc2247..1c6765de0732180c6bbb197269350f93340e658d 100644 (file)
--- a/configs/MPC8572DS_defconfig
+++ b/configs/MPC8572DS_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
+CONFIG_SYS_FSL_DDR2=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index 936cc3eb3aae9d8fbd7308cad84a7a2b911c1706..0fae73c14ac57d0d506c8fe916d7b250ad0eb2fa 100644 (file)
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SECURE_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_HUSH_PARSER=y

diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index 166bee32efe694d42b8bf26500f54c2660e58d72..f067c8c2f8cf547e3962c4238294e10337f0a9c1 100644 (file)
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -8,7 +8,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_CONSOLE_MUX is not set

diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig
index bd2b43828813513e0bb93bfcf482df94ecd7497e..b717fd7ada553a95ee0967368fe71290f8fa5f91 100644 (file)
--- a/configs/T1024QDS_DDR4_defconfig
+++ b/configs/T1024QDS_DDR4_defconfig
@@ -6,7 +6,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_CONSOLE_MUX is not set

diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index 1563609b4ff35af9cb11d5997a8e6b9e189250f5..861025b5907cb8da1ba23e462b3216b55b60269b 100644 (file)
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index a86657d3137163b68e053d966dfdeb0a7c4563fa..cda5f5cda338027b19e5fc02b10f9c8ab3370312 100644 (file)
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index f067c8c2f8cf547e3962c4238294e10337f0a9c1..a2afdd4c381466bdec6a757c0f2df3112faa2d33 100644 (file)
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index 2ab4752d1ab01b851cd7acc20d0f4ae5b7d1caf1..c4545533d83bd4a308adb535a33d9729771ca8a4 100644 (file)
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig
index e45baefe948463e7358d460c8bc9488cdef8eb3a..0a9e20cab6a3111702b374ba20a5df81f9e74c47 100644 (file)
--- a/configs/T1024QDS_defconfig
+++ b/configs/T1024QDS_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index d6ad422803df9dfb9fe2b8868ef50f803a3a4f69..bf3f46f5edf20b82f43636da6f64d8225773e1ae 100644 (file)
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 8ef312f5d4dd2218716b05420f347941e01bfbcd..1c2b3628562f8f499d867a911072b09b2f6a3500 100644 (file)
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index 736becfe3ed779f2edfef47f1db8bb93502a17a0..ba43e80bd5061a1599368b6a99a9953704e943d1 100644 (file)
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index b8dc3162841e5f22a413fcc3016b0a470385d839..785578085b4ea0debdfa96058a16364601cd78db 100644 (file)
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 3ba1e3550a03d083a328be4120b39778025faddb..86eaccc66bd4dd8943d2fbad6fb72cbadf846ba0 100644 (file)
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig
index c5ab87be99f43896f741a5f3565695a98d907d39..f80707774252a56fd2166339fea85dc31bfff7e9 100644 (file)
--- a/configs/T1040D4RDB_NAND_defconfig
+++ b/configs/T1040D4RDB_NAND_defconfig
@@ -12,7 +12,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND,SYS_FSL_DDR4"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y

diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig
index 63af509bf9b11437419766a9bb8645ee39ab374f..ebba63d3de8838e0f9dc3718bcc2c28fab1c3e48 100644 (file)
--- a/configs/T1040D4RDB_SDCARD_defconfig
+++ b/configs/T1040D4RDB_SDCARD_defconfig
@@ -12,7 +12,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,SYS_FSL_DDR4"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y

diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig
index 6c96cd0993ed0bbcdde937dc72fbee48eb2a9dd2..816dbb23caee5eda8ceb7f9e24733fc5788a8885 100644 (file)
--- a/configs/T1040D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig
@@ -7,7 +7,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y

diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig
index 587cca1bcaa5899b1cea4d2fe9d3c568767cd14c..d0b05b896cb294384c3b6a84c83a9cabbfa6d8f9 100644 (file)
--- a/configs/T1040D4RDB_SPIFLASH_defconfig
+++ b/configs/T1040D4RDB_SPIFLASH_defconfig
@@ -13,7 +13,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,SYS_FSL_DDR4"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y

diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig
index 87be2b59dbe4e4900191105012cb601475be3212..a0ea45877b02bcc9bfe05e6eb987f66086a45e1d 100644 (file)
--- a/configs/T1040D4RDB_defconfig
+++ b/configs/T1040D4RDB_defconfig
@@ -5,7 +5,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y

diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig
index 0af3b361564244939dc05095889ae902da4b252e..1c183f4be3523202c9d7e99c61251941bb1307dc 100644 (file)
--- a/configs/T1040QDS_DDR4_defconfig
+++ b/configs/T1040QDS_DDR4_defconfig
@@ -6,7 +6,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_CONSOLE_MUX is not set

diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index a07afc789903565bb33d015bae6531206992a3e0..aa1ae6e44d67b68478a1da7421ca8c2a722caae8 100644 (file)
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig
index 1c183f4be3523202c9d7e99c61251941bb1307dc..30b0701bda7f983ea37f78ef92452aa83842da7f 100644 (file)
--- a/configs/T1040QDS_defconfig
+++ b/configs/T1040QDS_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig
index 2129bf487c4bb7554a62d914d9acdf8318bc41aa..85b0a4af57c92285a0073e702f9e036f9e399070 100644 (file)
--- a/configs/T1040RDB_NAND_defconfig
+++ b/configs/T1040RDB_NAND_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig
index fc74dec7441c001512c3104c887ee3346682eb85..1b926c320bd145105fdcdd971514d2acd1f3430a 100644 (file)
--- a/configs/T1040RDB_SDCARD_defconfig
+++ b/configs/T1040RDB_SDCARD_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig
index c0965ebe8e3c37e3e1cace5c7201be5aedcc8914..634a1c2e16faf08bfff034d9ab01a5c693d564e6 100644 (file)
--- a/configs/T1040RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040RDB_SECURE_BOOT_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig
index 9f05ac370b39324a591dc7d16892e5828b0fbf2b..257df4b72e8c90cd0b9a065b7a1f1a2c53b4b80a 100644 (file)
--- a/configs/T1040RDB_SPIFLASH_defconfig
+++ b/configs/T1040RDB_SPIFLASH_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig
index e246c435d2b8521a719d164c317f1a1071421bf6..7929c9924713bab21868ad066db80e8ce58a9eda 100644 (file)
--- a/configs/T1040RDB_defconfig
+++ b/configs/T1040RDB_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 4c6b918a178a33920424b79420999f26da9a6a2d..6dcafb1919ea062cd24cd519fac301db1eb7e16c 100644 (file)
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -13,7 +13,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND,SYS_FSL_DDR4"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_CONSOLE_MUX is not set

diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index c2c03ee72348c9d38a651b289bc58d1d73d2b492..db2b220236bf2ad5ef861a8efb760fad45f0921e 100644 (file)
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -13,7 +13,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,SYS_FSL_DDR4"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_CONSOLE_MUX is not set

diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig
index b07464fd23c2d9028b823c6eeae91977626fd0e3..4318b964dc4731232a5ad114e41a0b2696ff3c14 100644 (file)
--- a/configs/T1042D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig
@@ -8,7 +8,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_CONSOLE_MUX is not set

diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 0a2f37903a4ab2e1449d0d7d069cbc9b923b9182..78b036abf809fa206a988ce0d3557d33dcb76a64 100644 (file)
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -14,7 +14,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,SYS_FSL_DDR4"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_CONSOLE_MUX is not set

diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index ef68c5ff5a7f85bdc3004752979d3468c1160094..5992559f38f2e669949c030a41956a92db11ba00 100644 (file)
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -6,7 +6,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_CONSOLE_MUX is not set

diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index 14aa1fd2ce699b5dd4913200c8c5f54b2bd21418..0daf8a7dbadc7158220b7e96afde9f5ad5229eb1 100644 (file)
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -36,6 +36,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index d8aa1f73ca3a51ec19311f6197deb294230cc5be..5ea696c588411250d07edddd6c03d1429f1ffd60 100644 (file)
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index af98400481fdf7b1dcd977ae6f5fce17d4554b86..f36e0ec5e7d78957a2747e6f5ca555caabbd55e5 100644 (file)
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index 369944dec247f1439b07c6d506f66ff3296994da..39d9fad4069ac20709a78645308b03df634f119f 100644 (file)
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig
index 4a9bd3a307eb529b2624000038dc7b767540286a..0eee7a5e14bcc78174461fb287f653bcdae8fbef 100644 (file)
--- a/configs/T1042RDB_PI_defconfig
+++ b/configs/T1042RDB_PI_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig
index dbb9c0b8e4550a9736ec56f9cbc766ff4102858c..6080bf590ed333624932b11fb90039acfc064ca0 100644 (file)
--- a/configs/T1042RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_SECURE_BOOT_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig
index 2223e6d6c9cedc7ea877f47f8ea304ae5796ecdd..19230e554911f54b6fb56affbf059021440f905a 100644 (file)
--- a/configs/T1042RDB_defconfig
+++ b/configs/T1042RDB_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_NETDEVICES=y

diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index 95930f3ae6957ced270923eb84449912ec44a72e..7b1bcc30d2c964007cf630293364d498e4d51427 100644 (file)
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_VIDEO=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
 CONFIG_FIT=y

diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index 27ef79d3c3cd2130d2a09341506dc5a14f00e1ae..fd5b3b28bca994e94fe504cd68b271b0b320b58b 100644 (file)
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_VIDEO=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
 CONFIG_FIT=y

diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index e28aa487b98c0e8823f21f5176502bc7e6669b05..1eaa6401c992211a1dea53673b98463124d28325 100644 (file)
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -38,6 +37,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y

diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index f3de25fdd55c6cd470b43ea7afe1ed512d8aa2a1..820d6fcce28e0840e804ec5d6c9b26496224033d 100644 (file)
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -1,7 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_SECURE_BOOT=y
-CONFIG_SYS_FSL_DDR3=y
 CONFIG_VIDEO=y
 # CONFIG_SYS_MALLOC_F is not set
 CONFIG_FIT=y
@@ -27,6 +26,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y

diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index 12205eaca72f3f320692f92a801503eec6c4dfb5..1972fd0c0ef69ed1fd61ec56cefc342201781fb8 100644 (file)
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_FSL_DDR3=y
 CONFIG_VIDEO=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
 CONFIG_FIT=y
@@ -27,6 +26,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y

diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 4d910cd4ba65b8536a5ec2d5fde8673887133690..dd441402058b353c4ab9501968f50208794d986e 100644 (file)
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_FSL_DDR3=y
 CONFIG_VIDEO=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
 CONFIG_FIT=y
@@ -28,6 +27,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y

diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index 79eb9fe9ab792894a98812ae35e2326cbeb44e7b..24443e2a054f7c40e23ad09c0ecda6dbb3a64faa 100644 (file)
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_FSL_DDR3=y
 CONFIG_VIDEO=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
 CONFIG_FIT=y
@@ -31,6 +30,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_NETDEVICES=y

diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index beed9ac6bd8924733f3ac4d795987a26f003919c..6f14a032bd444083ed0a535692609d921bab28c0 100644 (file)
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -39,6 +38,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y

diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index d6b08de2a26a54a12792890b1d24acdba38eeca9..49bcba07a28f63aabff745629b48695a6e4995ef 100644 (file)
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -41,6 +40,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_NETDEVICES=y

diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 6ddd54c7f3a51cad171c7f0c7d3a4397a4290541..55079825f3203ef0bc439096fa8fc81da8bbecfb 100644 (file)
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index dce9bda43ae76c4b5337ba08d5cca5422725bc0a..ec911e05047744e53f25833102981ba28b37bdc1 100644 (file)
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index ac6da0ea7a73daf255bbd51d1efab9526573a4f8..bb3466f1a91848bb555043670569fd63ce469c40 100644 (file)
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 454701a7dc9d5f062c6e91b71a02664b3f2c7206..5aa058bc1546152a76d3cfd3beb59a7631b6174b 100644 (file)
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_FSL_DDR3=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -24,6 +23,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
+CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_PCI=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index f76a698877b58ba65eb201f3e71b7e15942d2429..4e07ff36ab4347100f49b38caadaafdb62a46d7d 100644 (file)
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 22faf715eea46f817b31ff05df6d8d08464afee4..5c20633c591663c94a9d58b76c33bf6ba7d8ce92 100644 (file)
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index e8e31b66a5b2ac1d7ffc43c4106bf46981be6c12..707dcb5208d3896b2530967995d2a053a6f8d1c8 100644 (file)
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index ae2efeb20387eff7a343afe9d18cb01a70e9b226..d429017ddaa17705ad7a39e963fd6b885e79bee1 100644 (file)
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index 9042ac702a271d13a62b52ad016a1c027cf3cbec..9fa892138df3b81a4b58c129378aaab23da3f947 100644 (file)
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index 9f0c491f9f9824a42cee073cdd9381c294ff3982..73e66036a6fd8b261571d84229967976bb4d457e 100644 (file)
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1043ARDB=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index 0b3f2470345d230a8993a36350fc568da005242e..171ec37e28c5280a2a838316d0dcbaf29842d92c 100644 (file)
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1043ARDB=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_FSL_DDR4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index 2cc1a0b39c2853638246e5a7cda116f5a90232b1..5636885975322d3a4cb99f05534894045d2485f8 100644 (file)
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index 74fcd4ae7230ed66db2febe268bc2c2f77d82304..ebb1b5eb9de72083636f0f7a41a6f7f77b237c9e 100644 (file)
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
 CONFIG_NAND_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y

diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index c8a68faf0d3f95a14a1cd993e6d0c1daeb4eb3c5..bdb8433fc6286e39150d5f32b679379fbcc63581 100644 (file)
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_QSPI_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y

diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index fe9ad0efcaae0e29e29680818950c2858d42a8c5..9995047e15233562ba4a717f655dd29512d3740b 100644 (file)
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
 CONFIG_SD_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y

diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index 17000820a45230632e9611fcae083933359f77bb..4fccce421677e6c0d10d0a5ef5ac68c7c5ccd220 100644 (file)
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI"
 CONFIG_SD_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y

diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index fd21959becda0bdd85292f250af5a14ee46edaa5..38117f2124d743d9ee8c25789ccceb1bdd8268b1 100644 (file)
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SYS_FSL_DDR4,EMMC_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,EMMC_BOOT"
 CONFIG_SD_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y

diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig
index a973cf4b7590d2dce4b2acd4e17999ea938ccf73..765868a616f49a25a9cd17b787e76a36ffd454f4 100644 (file)
--- a/configs/ls1046ardb_qspi_defconfig
+++ b/configs/ls1046ardb_qspi_defconfig
@@ -5,7 +5,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_QSPI_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y

diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index 0b810d3bc4b9f7583d74bd4ea4840cb9fc6b130d..c74e007ca456b86e7513142770683d130a8f3823 100644 (file)
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SYS_FSL_DDR4"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
 CONFIG_SD_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y

diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig
index b0508a59ba07c276aa7496768748d549f2e2b059..2d20c28b8d906c3d65277aa8977c12764275e255 100644 (file)
--- a/configs/ls2080a_emu_defconfig
+++ b/configs/ls2080a_emu_defconfig
@@ -6,7 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="EMU,LS2080A"
 CONFIG_BOOTDELAY=10
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMD_CONSOLE is not set

diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 1ed6e0558f70f42e26d6e48442676722bc867d7f..b443be3505c894c685969bdca89a2068516af928 100644 (file)
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -6,7 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
 CONFIG_BOOTDELAY=10
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index 63a15ee9d5d6fea1d50842f0079f507f3e6a419e..d26f1b6e56dde2322744bc3bd004e653b22b4ccb 100644 (file)
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -6,7 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
 CONFIG_BOOTDELAY=10
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index 4500c137c100a3a7a5a29ce8f9daef81bb6ca661..91b3b57bee4b3708adce6a986f8650a8d0e02d0d 100644 (file)
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -12,7 +12,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y

diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 0e92ad45976a1a676638f8d0f622fc766e7de508..803d3bb264a756a7899a86f53c7388d81e189f7a 100644 (file)
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -5,7 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT,LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT,LS2080A"
 CONFIG_QSPI_BOOT=y
 CONFIG_BOOTDELAY=10
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 848abbc21c20322b670fc51fe01cdd86c2473a7b..0e6f4dcf98df30a32c4ce0dc03c03fdad58d3da6 100644 (file)
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -6,7 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
 CONFIG_BOOTDELAY=10
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index 4718ab380833b5372a0ba4d731057f8d23fb8e11..f22c6256dfa234afc6d4984f28ca78887516ed71 100644 (file)
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -6,7 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
 CONFIG_BOOTDELAY=10
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index b79e4e40093e6b93fd7716c342b75174f7e717bd..f42f00a28912c6b0af403a804d4ea572e4052f5c 100644 (file)
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -12,7 +12,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y

diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig
index e38e1da299770a69bd18c38b55389beae3281e9c..8e86a3306e6726815cb4bfe059fef8dd474f037f 100644 (file)
--- a/configs/xpedite537x_defconfig
+++ b/configs/xpedite537x_defconfig
@@ -15,5 +15,6 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_SNTP=y
+CONFIG_SYS_FSL_DDR2=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y

diff --git a/drivers/Kconfig b/drivers/Kconfig
index e8c9e0a32626cbae5ed3b1c16d293fab45bbaa3b..0e5d97d166464f3cb77dfff635353dc9d74d1ddc 100644 (file)
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -16,6 +16,8 @@ source "drivers/crypto/Kconfig"
 
 source "drivers/demo/Kconfig"
 
+source "drivers/ddr/fsl/Kconfig"
+
 source "drivers/dfu/Kconfig"
 
 source "drivers/dma/Kconfig"

diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
new file mode 100644 (file)
index 0000000..ad5858d
--- /dev/null
+++ b/drivers/ddr/fsl/Kconfig
@@ -0,0 +1,122 @@
+config SYS_FSL_DDR
+       bool
+       help
+         Select Freescale General DDR driver, shared between most Freescale
+         PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM-
+         based Layerscape SoCs (such as ls2080a).
+
+config SYS_FSL_MMDC
+       bool
+       help
+         Select Freescale Multi Mode DDR controller (MMDC).
+
+config SYS_FSL_DDR_BE
+       bool
+       help
+               Access DDR registers in big-endian
+
+config SYS_FSL_DDR_LE
+       bool
+       help
+               Access DDR registers in little-endian
+
+menu "Freescale DDR controllers"
+       depends on SYS_FSL_DDR
+
+config SYS_FSL_DDR_VER
+       int
+       default 50 if SYS_FSL_DDR_VER_50
+       default 47 if SYS_FSL_DDR_VER_47
+       default 46 if SYS_FSL_DDR_VER_46
+       default 44 if SYS_FSL_DDR_VER_44
+
+config SYS_FSL_DDR_VER_50
+       bool
+
+config SYS_FSL_DDR_VER_47
+       bool
+
+config SYS_FSL_DDR_VER_46
+       bool
+
+config SYS_FSL_DDR_VER_44
+       bool
+
+config SYS_FSL_DDRC_GEN1
+       bool
+       help
+         Enable Freescale DDR controller.
+
+config SYS_FSL_DDRC_GEN2
+       bool
+       depends on !MPC86xx
+       help
+         Enable Freescale DDR2 controller.
+
+config SYS_FSL_DDRC_86XX_GEN2
+       bool
+       depends on MPC86xx
+       help
+         Enable Freescale DDR2 controller for MPC86xx SoCs.
+
+config SYS_FSL_DDRC_GEN3
+       bool
+       depends on PPC
+       help
+         Enable Freescale DDR3 controller for PowerPC SoCs.
+
+config SYS_FSL_DDRC_ARM_GEN3
+       bool
+       depends on ARM
+       help
+         Enable Freescale DDR3 controller for ARM SoCs.
+
+config SYS_FSL_DDRC_GEN4
+       bool
+       help
+         Enable Freescale DDR4 controller.
+
+config SYS_FSL_HAS_DDR4
+       bool
+
+config SYS_FSL_HAS_DDR3
+       bool
+
+config SYS_FSL_HAS_DDR2
+       bool
+
+config SYS_FSL_HAS_DDR1
+       bool
+
+choice
+       prompt "DDR technology"
+       default SYS_FSL_DDR4 if SYS_FSL_HAS_DDR4
+       default SYS_FSL_DDR3 if SYS_FSL_HAS_DDR3
+       default SYS_FSL_DDR2 if SYS_FSL_HAS_DDR2
+       default SYS_FSL_DDR1 if SYS_FSL_HAS_DDR1
+
+config SYS_FSL_DDR4
+       bool "Freescale DDR4 controller"
+       depends on SYS_FSL_HAS_DDR4
+       select SYS_FSL_DDRC_GEN4
+
+config SYS_FSL_DDR3
+       bool "Freescale DDR3 controller"
+       depends on SYS_FSL_HAS_DDR3
+       select SYS_FSL_DDRC_GEN3 if PPC
+       select SYS_FSL_DDRC_ARM_GEN3 if ARM
+
+config SYS_FSL_DDR2
+       bool "Freescale DDR2 controller"
+       depends on SYS_FSL_HAS_DDR2
+       select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3)
+       select SYS_FSL_DDRC_86XX_GEN2 if MPC86xx
+
+config SYS_FSL_DDR1
+       bool "Freescale DDR1 controller"
+       depends on SYS_FSL_HAS_DDR1
+       select SYS_FSL_DDRC_GEN1
+
+endchoice
+
+endmenu

diff --git a/drivers/ddr/fsl/Makefile b/drivers/ddr/fsl/Makefile
index 00dea428e3a9fd15495cf6589a2c8425f7823b67..7935f7d56fde6c1cd3248997bf2272a0a630411b 100644 (file)
--- a/drivers/ddr/fsl/Makefile
+++ b/drivers/ddr/fsl/Makefile
@@ -30,7 +30,7 @@ obj-$(CONFIG_FSL_DDR_INTERACTIVE)     += interactive.o
 obj-$(CONFIG_SYS_FSL_DDRC_GEN1)        += mpc85xx_ddr_gen1.o
 obj-$(CONFIG_SYS_FSL_DDRC_GEN2)        += mpc85xx_ddr_gen2.o
 obj-$(CONFIG_SYS_FSL_DDRC_GEN3)        += mpc85xx_ddr_gen3.o
-obj-$(CONFIG_SYS_FSL_DDR_86XX)         += mpc86xx_ddr.o
+obj-$(CONFIG_SYS_FSL_DDRC_86XX_GEN2)   += mpc86xx_ddr.o
 obj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3)    += arm_ddr_gen3.o
 obj-$(CONFIG_SYS_FSL_DDRC_GEN4) += fsl_ddr_gen4.o
 obj-$(CONFIG_SYS_FSL_MMDC) += fsl_mmdc.o

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index e3ed3178a08046afcf3c04c4a0f3453ced329a6e..101a398472371de63c7d77a54b3802711588fbc2 100644 (file)
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -228,7 +228,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_SYS_FSL_DDR3
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_FSL_DDR_INTERACTIVE
 #endif

diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 33c015a6ab8e90ac958a1c80561ce683c3f19cac..78649369626a0aa19af1a837d83b2e6452fb7af3 100644 (file)
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -70,7 +70,6 @@
 #define CONFIG_SYS_MEMTEST_END         0x01ffffff
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR3
 #undef CONFIG_SYS_DDR_RAW_TIMING
 #undef CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM         0

diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 64b502d459703f1774f587d3d04cf484f62bcded..5a28225b98a412b7313bf625af554bb36a03bbc5 100644 (file)
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -125,7 +125,6 @@
 #define CONFIG_SYS_MEMTEST_END         0x01ffffff
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SYS_SPD_BUS_NUM         0
 #define SPD_EEPROM_ADDRESS1            0x54 /* I2C access */
 #define SPD_EEPROM_ADDRESS2            0x56 /* I2C access */

diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index a47d23ce1cdd74cefac7f70a5159d202a9a825ef..53ee98c3117c3c32f1cf76cfe8a0986550b201e5 100644 (file)
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -126,7 +126,6 @@
 #define CONFIG_PANIC_HANG
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM         0
 #define SPD_EEPROM_ADDRESS             0x50

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 12b1ce5c085bcfc2082abf6e2b22ba933ec40c8d..d289bf4d6f09a758822e94e4878d0ccda3f80c6b 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -60,12 +60,9 @@
 #define CONFIG_SPD_EEPROM              /* use SPD EEPROM for DDR setup*/
 
 /*
- * define CONFIG_SYS_FSL_DDR2 to use unified DDR driver
- * undefine it to use old spd_sdram.c
+ * SYS_FSL_DDR2 is selected in Kconfig to use unified DDR driver
+ * unselect it to use old spd_sdram.c
  */
-#define CONFIG_SYS_FSL_DDR2
-#ifdef CONFIG_SYS_FSL_DDR2
-#define CONFIG_SYS_FSL_DDRC_GEN2
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS1    0x52
 #define SPD_EEPROM_ADDRESS2    0x51
@@ -74,7 +71,6 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef
-#endif
 
 /*
  * 32-bit data path mode.

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 46ba306632cb8a29699bcecac1f979d96871e8be..b9dfd7622785a7eded93b4c8b0d64b9ea4cf5dd1 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -95,7 +95,6 @@
 
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD

diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 02ad0b0f260c34dc319157d29cb76fbc8216a62f..c0d74fa25fcb78898f6d7c73a7ae461ec3023a58 100644 (file)
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -68,7 +68,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 0d850fe2f116b0cd10a5536b6c2d427eacce2fe5..f2618a0e3bb773f471fc3bb7a57b8dcaecec073e 100644 (file)
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -43,7 +43,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 96c0b114f6e5385c8d76895226de711798a68785..406ac5a62452df427c3b1d21d824b2f1ae76b9fb 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -52,7 +52,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 7ffacf8a57d20965484f6f8f12ce9c0fc570277b..84292b441eb287a519b4dc394c6268c50777b338 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -62,7 +62,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD

diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 9f75f9baf82bcb10d90697635fe185e070b7f485..7058b855b7ff7391419b45268f3d1d2b6f6f8b90 100644 (file)
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -43,7 +43,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 871d14e93a1df0f898dadd72c533e71fd2fd1e91..218d77d1bd8e7e0fec1637d7f71f9802c1ee3c91 100644 (file)
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -67,7 +67,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 84fea61746388a6a2553e2c4df7274bf669b90ef..3573ef4df0562801884632ed7374c5258c887499 100644 (file)
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -50,7 +50,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD

diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 08d61cd8cbe5652f9c9a22f0f962b718b24205f4..22fe36ad7a84f610c391f57f7d94dfba12aefdbb 100644 (file)
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -77,7 +77,6 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR3
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 1c7dbc853e9ec17ea510fed1a0ad9164adfdbd04..c91e0324f54e760e1a77a5f90bd2f17a9b8d70a0 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -82,7 +82,6 @@
 
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD

diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 761032e923dec510c9be0b740282384b6a41696c..48eada5fbbada71c964cdc4228880bfa11afcbe2 100644 (file)
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -79,7 +79,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS                CONFIG_SYS_CCSRBAR_PHYS_LOW
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD for DDR */
 #define CONFIG_DDR_SPD

diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 8845ea917044bb91b843f2670251351462e2c19d..d413f215f328688d10bc027b0670f316119f4590 100644 (file)
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -101,7 +101,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * DDR Setup
  */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 3077b05fe5f812f08bb0f6d4461a28ad8b668ca4..cd9cd9ac56469a88d15e97043c0748febff1fb95 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -224,7 +224,6 @@
 #define CONFIG_PANIC_HANG              /* do not reset board on panic */
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM         1

diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 78d5b5d996be8d951bfd96e591949f96c9bcdd4e..d2cc61c6a95ab03a1caf58ac0cc6a1434824cc69 100644 (file)
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -136,7 +136,6 @@
 /* DDR Setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_SYS_FSL_DDR3
 
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER

diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index 1ebe83689ed9205f3a37b8f9cd8a3d0aaba434c7..d8ff10e284b622565b10e0df844c88d4346f2997 100644 (file)
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -68,7 +68,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SDRAM_SIZE          512u    /* DDR is 512M */
 #define CONFIG_SYS_SPD_BUS_NUM          0

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 5107aaaed0e08b1991e0260a7252324aad185d60..9c389d4739c719b36f9291862271bb96a9ccc6a6 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -165,7 +165,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x52

diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index b2c922141396e58d273192262dd380e204a4eea2..ea1c5e23dcdb12f393cbffd20e6e5285272bd369 100644 (file)
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -248,9 +248,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_DDR_SPD
-#ifndef CONFIG_SYS_FSL_DDR4
-#define CONFIG_SYS_FSL_DDR3
-#endif
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 37bc506937b44598326e9d30e63bef0789708faa..12b7039372054640d513aaef58aeb89f95040f80 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -273,12 +273,10 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_FSL_DDR_INTERACTIVE
 #if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51
 #define CONFIG_SYS_SDRAM_SIZE  4096    /* for fixed parameter use */
 #elif defined(CONFIG_TARGET_T1023RDB)
-#define CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_SYS_SDRAM_SIZE   2048
 #endif

diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index e4073eaf4e4920f05a926621b70473e4566bab2d..ad8e9c0e9046335b1c80f91edd8e20ee7c7b9d02 100644 (file)
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -168,9 +168,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#ifndef CONFIG_SYS_FSL_DDR4
-#define CONFIG_SYS_FSL_DDR3
-#endif
 #define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SPD_BUS_NUM 0

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index abf0d714f1cd0c87733bb07ebb080b2eec4b9ffe..78be32fd9e5b421637c0a7f257a5a11bab49c5d9 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -273,9 +273,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#ifndef CONFIG_SYS_FSL_DDR4
-#define CONFIG_SYS_FSL_DDR3
-#endif
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 940b1c7d4439afdfef718cd762c07822fea47f29..14356d09063e88d01d667e99f135ff336adcf2ef 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -220,7 +220,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 454bfdc0f6224c12d53979918b2fbe2c0159079c..325080f4674542d39f963e187d7925a3ae910fbc 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -205,7 +205,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 445af8436d70c48d94c40841b2413d70970469d9..8c891cb08ee3d573ce511c79e0aea6a9ec094ca4 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -133,7 +133,6 @@
 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 
 /*
  * IFC Definitions

diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 29544b28a874df333aad3c457f792a6e3548e567..3d220c2109a6335a084362531254ae86f6564526 100644 (file)
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -176,7 +176,6 @@
 
 /* DDR Setup */
 #define CONFIG_DDR_ECC_ENABLE
-#define CONFIG_SYS_FSL_DDR3
 #ifndef CONFIG_DDR_ECC_ENABLE
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_DDR_SPD

diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index 4f6927c182a8344f3dedf100c384b1261783bb20..7347b68eb4ce798a325f9d7d582518419919b015 100644 (file)
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -122,7 +122,6 @@
 #define CONFIG_SYS_SDRAM_SIZE 1024
 #define CONFIG_VERY_BIG_RAM
 
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_NUM_DDR_CONTROLLERS     1
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 5720386d1e4bdeb38965904e591a7657a2187d38..115df2a0cd387fb70011cddba03a9a664d00f8c3 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -176,7 +176,6 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 
 #define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS1    0x51

diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index b0ae073a968a639d785a9ea21fda3960559c26b0..d1b85474aa39940f95c8297e31552d204ef27f94 100644 (file)
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -123,7 +123,6 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 
 #define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS1    0x51

diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h
index 87f1932513cf1ef145e7bd9215f01db1ce7162f0..22194f99ed417538261b48302e1b27b804a7e09b 100644 (file)
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -101,7 +101,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SPD_BUS_NUM 0

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index d3e058526c911abf0f3492045966eb2c3983b2d3..a3afa6b7eb173916b0c82c8889a361a74afb698e 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -314,7 +314,6 @@
 #endif
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM 1

diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 0cf6bf23dd1bff4118879ffaeca5e6a2d54672b4..f1492979dd184d0ee0acc1b4a50519e84ca975ef 100644 (file)
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -81,7 +81,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR3
 
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_512M
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index b81ff75656b5ddc30e46ca9668288498ba749f01..7c5961a670be727ffa1b3391d18881a59e2ea859 100644 (file)
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -96,7 +96,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #undef CONFIG_DDR_ECC                  /* only for ECC DDR module */
 /*

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index d148f877fa6813da8e08e2f9301b14b12e28c0e7..806fc2749b802ead24c0ab1630f9172a12c0cac3 100644 (file)
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -68,7 +68,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD

diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 91982a4ffeabc6349ac3b6fc489848b9188a2bd2..4fd6f4def6c6bd687e49bf46798cff9a792551d6 100644 (file)
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -89,7 +89,6 @@
 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 
 /*
  * IFC Definitions

diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index df36ad7ce9661d4a01e99df59bf627230c105dd7..49c485ee7f3147381686419954f7e8e3e406c9fa 100644 (file)
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -35,7 +35,6 @@
 /*
  * DDR config
  */
-#define CONFIG_SYS_FSL_DDR2
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef

diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index 22ada4c1d424c98246455720771ed50162f6f28e..cc8b794d3d6ddd711e9d576d0b4c5ef9cce5a653 100644 (file)
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -32,7 +32,6 @@
 /*
  * DDR config
  */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD

diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index 73a8a20cc6f8379124a01a59b627c12bf124150b..f37cf881716e90bfaac7d850c198a672e6990ab0 100644 (file)
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -41,7 +41,6 @@
 /*
  * DDR config
  */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD

diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index 7582813498169225fb8ca49a5ee2cd25477dd2bc..620314220280c93473b4ba77cbccc6a9552c7855 100644 (file)
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -42,7 +42,6 @@
 /*
  * DDR config
  */
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 5a60174b1b6f9956b1bb55b475a36494d8990afe..797611d0e6b91795c26294baba743cc419ffa65a 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -5327,20 +5327,9 @@ CONFIG_SYS_FSL_DCSR_DDR_ADDR
 CONFIG_SYS_FSL_DCSR_SIZE
 CONFIG_SYS_FSL_DCU_BE
 CONFIG_SYS_FSL_DCU_LE
-CONFIG_SYS_FSL_DDR
-CONFIG_SYS_FSL_DDR1
-CONFIG_SYS_FSL_DDR2
 CONFIG_SYS_FSL_DDR2_ADDR
-CONFIG_SYS_FSL_DDR3
 CONFIG_SYS_FSL_DDR3L
 CONFIG_SYS_FSL_DDR3_ADDR
-CONFIG_SYS_FSL_DDR4
-CONFIG_SYS_FSL_DDRC_ARM_GEN3
-CONFIG_SYS_FSL_DDRC_GEN1
-CONFIG_SYS_FSL_DDRC_GEN2
-CONFIG_SYS_FSL_DDRC_GEN3
-CONFIG_SYS_FSL_DDRC_GEN4
-CONFIG_SYS_FSL_DDR_86XX
 CONFIG_SYS_FSL_DDR_ADDR
 CONFIG_SYS_FSL_DDR_BE
 CONFIG_SYS_FSL_DDR_EMU