]> git.sur5r.net Git - u-boot/commitdiff
ARM: Introduce function to switch to hypervisor mode
authorKeerthy <j-keerthy@ti.com>
Wed, 14 Sep 2016 05:13:32 +0000 (10:43 +0530)
committerTom Rini <trini@konsulko.com>
Fri, 7 Oct 2016 00:58:16 +0000 (20:58 -0400)
On some of the SoCs one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it
jumps to boot loader. Hence introduce a weak function which can be
overridden based on the SoC type and switch to hypervisor mode in a
custom way.

Cc: beagleboard-x15@googlegroups.com
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
arch/arm/cpu/armv7/start.S
arch/arm/include/asm/system.h

index 691e5d3fe165c79af45826e24cda182560333e67..7eee54ba700211f27265cbbe86b816b24f3acc93 100644 (file)
@@ -17,6 +17,7 @@
 #include <config.h>
 #include <asm/system.h>
 #include <linux/linkage.h>
+#include <asm/armv7.h>
 
 /*************************************************************************
  *
 
        .globl  reset
        .globl  save_boot_params_ret
+#ifdef CONFIG_ARMV7_LPAE
+       .global switch_to_hypervisor_ret
+#endif
 
 reset:
        /* Allow the board to save important registers */
        b       save_boot_params
 save_boot_params_ret:
+#ifdef CONFIG_ARMV7_LPAE
+/*
+ * check for Hypervisor support
+ */
+       mrc     p15, 0, r0, c0, c1, 1           @ read ID_PFR1
+       and     r0, r0, #CPUID_ARM_VIRT_MASK    @ mask virtualization bits
+       cmp     r0, #(1 << CPUID_ARM_VIRT_SHIFT)
+       beq     switch_to_hypervisor
+switch_to_hypervisor_ret:
+#endif
        /*
         * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
         * except if in HYP mode already
@@ -103,6 +117,13 @@ ENTRY(save_boot_params)
 ENDPROC(save_boot_params)
        .weak   save_boot_params
 
+#ifdef CONFIG_ARMV7_LPAE
+ENTRY(switch_to_hypervisor)
+       b       switch_to_hypervisor_ret
+ENDPROC(switch_to_hypervisor)
+       .weak   switch_to_hypervisor
+#endif
+
 /*************************************************************************
  *
  * cpu_init_cp15
index 7b7b8675215e60c893f93eff8c8ec623cb23d529..c18e1e3a10ee156fa6774da14d827740ebf2ff02 100644 (file)
@@ -223,6 +223,10 @@ void __noreturn psci_system_reset(bool smc);
  */
 void save_boot_params_ret(void);
 
+#ifdef CONFIG_ARMV7_LPAE
+void switch_to_hypervisor_ret(void);
+#endif
+
 #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
 
 #ifdef __ARM_ARCH_7A__