The NMDK8815 board is distributed by ST Microelectornics.
Other (proprietary) code must be run to unlock the CPU before
U-Boot runs. doc/README.nmdk8815 outlines the boot sequence.
This is the initial port, with basic infrastructure and
a working serial port.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
pdnb3 xscale
scpu xscale
+Alessandro Rubini <rubini@unipv.it>
+Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
+
+ nmdk8815 ARM926EJS (Nomadik 8815 Soc)
+
Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
mx1ads \
mx1fs2 \
netstar \
+ nmdk8815 \
omap1510inn \
omap1610h2 \
omap1610inn \
netstar_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t netstar
+nmdk8815_config \
+nmdk8815_onenand_config: unconfig
+ @mkdir -p $(obj)include
+ @ > $(obj)include/config.h
+ @if [ "$(findstring _onenand, $@)" ] ; then \
+ echo "#define CONFIG_BOOT_ONENAND" >> $(obj)include/config.h; \
+ $(XECHO) "... configured for OneNand Flash"; \
+ else \
+ $(XECHO) "... configured for Nand Flash"; \
+ fi
+ @$(MKCONFIG) -a nmdk8815 arm arm926ejs nmdk8815 st nomadik
+
omap1510inn_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
--- /dev/null
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2004
+# ARM Ltd.
+# Philippe Robin, <philippe.robin@arm.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := nmdk8815.o
+SOBJS := platform.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- /dev/null
+# (C) Copyright 2007
+# STMicroelectronics, <www.st.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#
+# image should be loaded at 0x01000000
+#
+
+TEXT_BASE = 0x03F80000
--- /dev/null
+/*
+ * (C) Copyright 2005
+ * STMicrolelctronics, <www.st.com>
+ *
+ * (C) Copyright 2004
+ * ARM Ltd.
+ * Philippe Robin, <philippe.robin@arm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+void show_boot_progress(int progress)
+{
+ printf("%i\n", progress);
+}
+#endif
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+int board_init(void)
+{
+ gd->bd->bi_arch_number = MACH_TYPE_NOMADIK;
+ gd->bd->bi_boot_params = 0x00000100;
+ writel(0xC37800F0, NOMADIK_GPIO1_BASE + 0x20);
+ writel(0x00000000, NOMADIK_GPIO1_BASE + 0x24);
+ writel(0x00000000, NOMADIK_GPIO1_BASE + 0x28);
+ writel(readl(NOMADIK_SRC_BASE) | 0x8000, NOMADIK_SRC_BASE);
+
+ icache_enable();
+
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ setenv("verify", "n");
+ return 0;
+}
+
+int dram_init(void)
+{
+ /* set dram bank start addr and size */
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ return 0;
+}
--- /dev/null
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2005
+ * STMicrolelctronics, <www.st.com>
+ *
+ * (C) Copyright 2004, ARM Ltd.
+ * Philippe Robin, <philippe.robin@arm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+
+.globl lowlevel_init
+lowlevel_init:
+ /* Jump to the flash address */
+ ldr r0, =CFG_ONENAND_BASE
+
+ /*
+ * Make it independent whether we boot from 0x0 or 0x30000000.
+ * Non-portable: it relies on the knowledge that ip has to be updated
+ */
+ orr ip, ip, r0 /* adjust return address of cpu_init_crit */
+ orr lr, lr, r0 /* adjust return address */
+ orr pc, pc, r0 /* jump to the normal address */
+ nop
+
+ /* Initialize PLL, Remap clear, FSMC, MPMC here! */
+ /* What about GPIO, CLCD and UART */
+
+ /* PLL Initialization */
+ /* Prog the PLL1 @ 266 MHz ==> SDRAM Clock = 100.8 MHz */
+ ldr r0, =NOMADIK_SRC_BASE
+
+ ldr r1, =0x2B013502
+
+ str r1, [r0, #0x14]
+
+ /* Used to set all the timers clock to 2.4MHZ */
+ ldr r1, =0x2AAAA004
+ str r1, [r0]
+
+ ldr r1, =0x10000000
+ str r1, [r0, #0x10]
+
+ /* FSMC setup ---- */
+ ldr r0, =NOMADIK_FSMC_BASE
+
+ ldr r1, =0x10DB /* For 16-bit NOR flash */
+ str r1, [r0, #0x08]
+
+ ldr r1, =0x03333333 /* For 16-bit NOR flash */
+ str r1, [r0, #0xc]
+
+ /* oneNAND setting */
+ ldr r1, =0x0000105B /* BCR0 Prog control register */
+ str r1, [r0]
+
+ ldr r1, =0x0A200551 /* BTR0 Prog timing register */
+ str r1, [r0, #0x04]
+
+ /* preload the instructions into icache */
+ add r0, pc, #0x1F
+ bic r0, r0, #0x1F
+ mcr p15, 0, r0, c7, c13, 1
+ add r0, r0, #0x20
+ mcr p15, 0, r0, c7, c13, 1
+
+ /* Now Clear Remap */
+ ldr r0, =NOMADIK_SRC_BASE
+
+ ldr r1, =0x2004
+ str r1, [r0]
+
+ ldr r1, =0x10000000
+ str r1, [r0, #0x10]
+
+ ldr r0, =0x101E9000
+ ldr r1, =0x2004
+ str r1, [r0]
+
+ ldr r0, =NOMADIK_SRC_BASE
+ ldr r1, =0x2104
+ str r1, [r0]
+
+ /* FSMC setup -- */
+ mov r0, #(NOMADIK_FSMC_BASE & 0x10000000)
+ orr r0, r0, #(NOMADIK_FSMC_BASE & 0x0FFFFFFF)
+
+ ldr r1, =0x10DB /* For 16-bit NOR flash */
+ str r1, [r0, #0x8]
+
+ ldr r1, =0x03333333 /* For 16-bit NOR flash */
+ str r1, [r0, #0xc]
+
+ /* MPMC Setup */
+ ldr r0, =NOMADIK_MPMC_BASE
+
+ ldr r1, =0xF00003
+ str r1, [r0] /* Enable the MPMC and the DLL */
+
+ ldr r1, =0x183
+ str r1, [r0, #0x20]
+
+ ldr r2, =NOMADIK_PMU_BASE
+
+ ldr r1, =0x1111
+ str r1, [r2]
+
+ ldr r1, =0x1111 /* Prog the, mand delay strategy */
+ str r1, [r0, #0x28]
+
+ ldr r1, =0x103 /* NOP ,mand */
+ str r1, [r0, #0x20]
+
+ /* FIXME -- Wait required here */
+
+ ldr r1, =0x103 /* PALL ,mand*/
+ str r1, [r0, #0x20]
+
+ ldr r1, =0x1
+ str r1, [r0, #0x24] /* To do at least two auto-refresh */
+
+ /* FIXME -- Wait required here */
+
+ /* Auto-refresh period = 7.8us @ SDRAM Clock = 100.8 MHz */
+ ldr r1, =0x31
+ str r1, [r0, #0x24]
+
+ /* Prog Little Endian, Not defined in 8800 board */
+ ldr r1, =0x0
+ str r1, [r0, #0x8]
+
+
+ ldr r1, =0x2
+ str r1, [r0, #0x30] /* Prog tRP timing */
+
+ ldr r1, =0x4 /* Change for 8815 */
+ str r1, [r0, #0x34] /* Prog tRAS timing */
+
+ ldr r1, =0xB
+ str r1, [r0, #0x38] /* Prog tSREX timing */
+
+
+ ldr r1, =0x1
+ str r1, [r0, #0x44] /* Prog tWR timing */
+
+ ldr r1, =0x8
+ str r1, [r0, #0x48] /* Prog tRC timing */
+
+ ldr r1, =0xA
+ str r1, [r0, #0x4C] /* Prog tRFC timing */
+
+ ldr r1, =0xB
+ str r1, [r0, #0x50] /* Prog tXSR timing */
+
+ ldr r1, =0x1
+ str r1, [r0, #0x54] /* Prog tRRD timing */
+
+ ldr r1, =0x1
+ str r1, [r0, #0x58] /* Prog tMRD timing */
+
+ ldr r1, =0x1
+ str r1, [r0, #0x5C] /* Prog tCDLR timing */
+
+ /* DDR-SDRAM MEMORY IS ON BANK0 8815 */
+ ldr r1, =0x304 /* Prog RAS and CAS for CS 0 */
+ str r1, [r0, #0x104]
+
+ /* SDR-SDRAM MEMORY IS ON BANK1 8815 */
+ ldr r1, =0x304 /* Prog RAS and CAS for CS 1 */
+ str r1, [r0, #0x124]
+ /* THE DATA BUS WIDE IS PROGRAM FOR 16-BITS */
+ /* DDR-SDRAM MEMORY IS ON BANK0*/
+
+ ldr r1, =0x884 /* 8815 : config reg in BRC for CS0 */
+ str r1, [r0, #0x100]
+
+ /*SDR-SDRAM MEMORY IS ON BANK1*/
+
+ ldr r1, =0x884 /* 8815 : config reg in BRC for CS1 */
+ str r1, [r0, #0x120]
+
+ ldr r1, =0x83 /*MODE Mand*/
+ str r1, [r0, #0x20]
+
+ /* LOAD MODE REGISTER FOR 2 bursts of 16b, with DDR mem ON BANK0 */
+
+ ldr r1, =0x62000 /*Data in*/
+ ldr r1, [r1]
+
+ /* LOAD MODE REGISTER FOR 2 bursts of 16b, with DDR mem ON BANK1 */
+
+ ldr r1, =0x8062000
+ ldr r1, [r1]
+
+ ldr r1, =0x003
+ str r1, [r0, #0x20]
+
+ /* ENABLE ALL THE BUFFER FOR EACH AHB PORT*/
+
+ ldr r1, =0x01 /* Enable buffer 0 */
+ str r1, [r0, #0x400]
+
+ ldr r1, =0x01 /* Enable buffer 1 */
+ str r1, [r0, #0x420]
+
+ ldr r1, =0x01 /* Enable buffer 2 */
+ str r1, [r0, #0x440]
+
+ ldr r1, =0x01 /* Enable buffer 3 */
+ str r1, [r0, #0x460]
+
+ ldr r1, =0x01 /* Enable buffer 4 */
+ str r1, [r0, #0x480]
+
+ ldr r1, =0x01 /* Enable buffer 5 */
+ str r1, [r0, #0x4A0]
+
+ /* GPIO settings */
+
+ ldr r0, =NOMADIK_GPIO1_BASE
+
+ ldr r1, =0xC0600000
+ str r1, [r0, #0x20]
+
+ ldr r1, =0x3F9FFFFF /* ABHI change this for uart1 */
+ str r1, [r0, #0x24]
+
+ ldr r1, =0x3F9FFFFF /* ABHI change this for uart1 */
+ str r1, [r0, #0x28]
+
+ ldr r0, =NOMADIK_GPIO0_BASE
+
+ ldr r1, =0xFFFFFFFF
+ str r1, [r0, #0x20]
+
+ ldr r1, =0x00
+ str r1, [r0, #0x24]
+
+ ldr r1, =0x00
+ str r1, [r0, #0x28]
+
+ /* Configure CPLD_CTRL register for enabling MUX logic for UART0/UART2 */
+
+ ldr r0, =NOMADIK_FSMC_BASE
+
+ ldr r1, =0x10DB /* INIT FSMC bank 0 */
+ str r1, [r0, #0x00]
+
+ ldr r1, =0x0FFFFFFF
+ str r1, [r0, #0x04]
+
+ ldr r1, =0x010DB /* INIT FSMC bank 1 */
+ str r1, [r0, #0x08]
+
+ ldr r1, =0x00FFFFFFF
+ str r1, [r0, #0x0C]
+
+ ldr r0, =NOMADIK_UART0_BASE
+
+ ldr r1, =0x00000000
+ str r1, [r0, #0x30]
+
+ ldr r1, =0x0000004e
+ str r1, [r0, #0x24]
+
+ ldr r1, =0x00000008
+ str r1, [r0, #0x28]
+
+ ldr r1, =0x00000060
+ str r1, [r0, #0x2C]
+
+ ldr r1, =0x00000301
+ str r1, [r0, #0x30]
+
+ ldr r1, =0x00000066
+ str r1, [r0]
+
+ ldr r0, =NOMADIK_UART1_BASE
+
+ ldr r1, =0x00000000
+ str r1, [r0, #0x30]
+
+ ldr r1, =0x0000004e
+ str r1, [r0, #0x24]
+
+ ldr r1, =0x00000008
+ str r1, [r0, #0x28]
+
+ ldr r1, =0x00000060
+ str r1, [r0, #0x2C]
+
+ ldr r1, =0x00000301
+ str r1, [r0, #0x30]
+
+ ldr r1, =0x00000066
+ str r1, [r0]
+
+ ldr r0, =NOMADIK_UART2_BASE
+
+ ldr r1, =0x00000000
+ str r1, [r0, #0x30]
+
+ ldr r1, =0x0000004e
+ str r1, [r0, #0x24]
+
+ ldr r1, =0x00000008
+ str r1, [r0, #0x28]
+
+ ldr r1, =0x00000060
+ str r1, [r0, #0x2C]
+
+ ldr r1, =0x00000301
+ str r1, [r0, #0x30]
+
+ ldr r1, =0x00000066
+ str r1, [r0]
+
+ /* Configure CPLD to enable UART0 */
+
+ mov pc, lr
--- /dev/null
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+ . = ALIGN(4);
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
+ _end = .;
+}
--- /dev/null
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(SOC).a
+
+COBJS = timer.o
+SOBJS = reset.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS)) $(addprefix $(obj),$(SOBJS))
+
+all: $(obj).depend $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- /dev/null
+#include <config.h>
+/*
+ * Processor reset for Nomadik
+ */
+
+ .align 5
+.globl reset_cpu
+reset_cpu:
+#if defined CONFIG_NOMADIK_8815
+ ldr r0, =NOMADIK_SRC_BASE
+ ldr r1, =0x1
+ str r1, [r0, #0x18]
+#else
+ ldr r1, rstctl1 /* get clkm1 reset ctl */
+ mov r3, #0x0
+ strh r3, [r1] /* clear it */
+ mov r3, #0x8
+ strh r3, [r1] /* force dsp+arm reset */
+#endif
+
+_loop_forever:
+ b _loop_forever
+
+rstctl1:
+ .word 0xfffece10
--- /dev/null
+/*
+ * (C) Copyright 2003
+ * Texas Instruments <www.ti.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * (C) Copyright 2002-2004
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * (C) Copyright 2004
+ * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <arm926ejs.h>
+
+#define TIMER_LOAD_VAL 0xffffffff
+
+/* macro to read the 32 bit timer */
+#define READ_TIMER readl(CONFIG_SYS_TIMERBASE + 20)
+
+static ulong timestamp;
+static ulong lastdec;
+
+/* nothing really to do with interrupts, just starts up a counter. */
+int timer_init(void)
+{
+ /* Load timer with initial value */
+ writel(TIMER_LOAD_VAL, CONFIG_SYS_TIMERBASE + 16);
+
+ /*
+ * Set timer to be enabled, free-running, no interrupts, 256 divider,
+ * 32-bit, wrap-mode
+ */
+ writel(0x8a, CONFIG_SYS_TIMERBASE + 24);
+
+ /* init the timestamp and lastdec value */
+ reset_timer_masked();
+
+ return 0;
+}
+
+/*
+ * timer without interrupts
+ */
+void reset_timer(void)
+{
+ reset_timer_masked();
+}
+
+ulong get_timer(ulong base)
+{
+ return get_timer_masked() - base;
+}
+
+void set_timer(ulong t)
+{
+ timestamp = t;
+}
+
+/* delay x useconds AND perserve advance timstamp value */
+void udelay(unsigned long usec)
+{
+ ulong tmo, tmp;
+
+ if (usec >= 1000) {
+ /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize */
+ tmo *= CONFIG_SYS_HZ; /* find number of "ticks" */
+ tmo /= 1000; /* finish normalize. */
+ } else {
+ /* small number, don't kill it prior to HZ multiply */
+ tmo = usec * CONFIG_SYS_HZ;
+ tmo /= (1000 * 1000);
+ }
+
+ tmp = get_timer(0); /* get current timestamp */
+ if ((tmo + tmp + 1) < tmp) /* will roll time stamp? */
+ reset_timer_masked(); /* reset to 0, set lastdec value */
+ else
+ tmo += tmp;
+
+ while (get_timer_masked() < tmo)
+ /* nothing */ ;
+}
+
+void reset_timer_masked(void)
+{
+ /* reset time */
+ lastdec = READ_TIMER; /* capure current decrementer value time */
+ timestamp = 0; /* start "advancing" time stamp from 0 */
+}
+
+ulong get_timer_masked(void)
+{
+ ulong now = READ_TIMER; /* current tick value */
+
+ if (lastdec >= now) { /* normal mode (non roll) */
+ /* move stamp fordward */
+ timestamp += lastdec - now;
+ } else {
+ /*
+ * An overflow is expected.
+ * nts = ts + ld + (TLV - now)
+ * ts=old stamp, ld=time that passed before passing through -1
+ * (TLV-now) amount of time after passing though -1
+ * nts = new "advancing time stamp"...it could also roll
+ */
+ timestamp += lastdec + TIMER_LOAD_VAL - now;
+ }
+ lastdec = now;
+
+ return timestamp;
+}
+
+/* waits specified delay value and resets timestamp */
+void udelay_masked(unsigned long usec)
+{
+ ulong tmo;
+
+ if (usec >= 1000) {
+ /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize */
+ tmo *= CONFIG_SYS_HZ; /* find number of "ticks" */
+ tmo /= 1000; /* finish normalize. */
+ } else {
+ /* else small number, don't kill it prior to HZ multiply */
+ tmo = usec * CONFIG_SYS_HZ;
+ tmo /= (1000*1000);
+ }
+
+ reset_timer_masked();
+ /* set "advancing" timestamp to 0, set lastdec vaule */
+
+ while (get_timer_masked() < tmo)
+ /* nothing */ ;
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+ return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+ ulong tbclk;
+
+ tbclk = CONFIG_SYS_HZ;
+ return tbclk;
+}
--- /dev/null
+
+The Nomadik 8815 CPU has a "secure" boot mode where no external access
+(not even JTAG) is allowed. The "remap" bits in the evaluation board
+are configured in order to boot from the internal ROM memory (in
+secure mode).
+
+The boot process as defined by the manufacturer executes external code
+(loaded from NAND or OneNAND) that that disables such "security" in
+order to run u-boot and later the kernel without constraints. Such
+code is a proprietary initial boot loader, called "X-Loader" (in case
+anyone wonders, it has no relations with other loaders with the same
+name and there is no GPL code inside the ST X-Loader).
+
+SDRAM configuration, PLL setup and initial loading from NAND is
+implemented in the X-Loader, so U-Boot is already running in SDRAM
+when control is handed over to it.
+
+
+On www.st.com/nomadik and on www.stnwireless.com there are documents,
+summary data and white papers on Nomadik. The full datasheet for
+STn8815 is not currently available on line but under specific request
+to the local ST sales offices.
--- /dev/null
+/*
+ * (C) Copyright 2005
+ * STMicroelectronics.
+ * Configuration settings for the STn8815 nomadik board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_ARM926EJS
+#define CONFIG_NOMADIK
+#define CONFIG_NOMADIK_8815
+#define CONFIG_NOMADIK_NDK15
+#define CONFIG_NOMADIK_NHK15
+
+#define CONFIG_SKIP_LOWLEVEL_INIT /* we have already been loaded to RAM */
+
+/* commands */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+/* At this point there is no flash driver, so remove some commands */
+#undef CONFIG_CMD_ENV
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+
+/* user interface */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT "Nomadik> "
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_LOAD_ADDR 0x800000 /* default load address */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE
+
+/* boot config */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_BOOTDELAY 1
+#define CONFIG_BOOTARGS "root=/dev/ram0 console=ttyAMA1,115200n8 init=linuxrc"
+#define CONFIG_BOOTCOMMAND "fsload 0x100000 kernel.uimg;" \
+ " fsload 0x800000 initrd.gz.uimg;" \
+ " bootm 0x100000 0x800000"
+
+/* memory-related information */
+#define CONFIG_NR_DRAM_BANKS 2
+#define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define PHYS_SDRAM_2 0x08000000 /* SDR-SDRAM BANK #2*/
+#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
+
+#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+# define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */
+# define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */
+#endif
+
+#define CONFIG_SYS_MEMTEST_START 0x00000000
+#define CONFIG_SYS_MEMTEST_END 0x0FFFFFFF
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256 * 1024)
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
+
+#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
+
+/* timing informazion */
+#define CONFIG_SYS_HZ (2400000 / 256) /* Timer0: 2.4Mhz + divider */
+#define CONFIG_SYS_TIMERBASE 0x101E2000
+#undef CONFIG_SYS_CLKS_IN_HZ
+
+/* serial port (PL011) configuration */
+#define CONFIG_PL011_SERIAL
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CFG_SERIAL0 0x101FD000
+#define CFG_SERIAL1 0x101FB000
+
+#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
+#define CONFIG_PL011_CLOCK 48000000
+
+/* Ethernet */
+#define PCI_MEMORY_VADDR 0xe8000000
+#define PCI_IO_VADDR 0xee000000
+#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
+#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR)
+
+#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111*/
+#define CONFIG_SMC91111_BASE 0x34000300
+#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
+#define CONFIG_SMC_USE_32_BIT
+#define CONFIG_BOOTFILE "uImage"
+
+/* flash memory and filesystem information */
+#define CONFIG_DOS_PARTITION
+#define CONFIG_MTD_ONENAND_VERIFY_WRITE
+#define CONFIG_SYS_ONENAND_BASE 0x30000000
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE 0x40000000
+
+#define CONFIG_SYS_NO_FLASH
+
+#ifdef CONFIG_BOOT_ONENAND
+
+# undef CONFIG_CMD_NAND /* Temporary: nand and onenand can't coexist */
+ /* Partition Size Start
+ * XloaderTOC + X-Loader 256KB 0x00000000
+ * Memory init function 256KB 0x00040000
+ * U-Boot 2MB 0x00080000
+ * Sysimage (kernel + ramdisk) 4MB 0x00280000
+ * JFFS2 Root filesystem 22MB 0x00680000
+ * JFFS2 User Data 227.5MB 0x01C80000
+ */
+# define CONFIG_JFFS2_PART_SIZE 0x400000
+# define CONFIG_JFFS2_PART_OFFSET 0x280000
+
+# define CONFIG_ENV_IS_IN_ONENAND
+# define CONFIG_ENV_SIZE (256 * 1024)
+# define CONFIG_ENV_ADDR 0x30300000
+
+#else /* ! CONFIG_BOOT_ONENAND */
+
+# undef CONFIG_CMD_ONENAND /* Temporary: nand and onenand can't coexist */
+
+# define CONFIG_JFFS2_DEV "nand0"
+# define CONFIG_JFFS2_NAND 1 /* For the jffs2 support*/
+# define CONFIG_JFFS2_PART_SIZE 0x00300000
+# define CONFIG_JFFS2_PART_OFFSET 0x00280000
+
+# define CONFIG_ENV_IS_IN_NAND
+# define CONFIG_ENV_SIZE 0x20000 /*128 Kb*/
+# define CONFIG_ENV_OFFSET (0x8000000 - CONFIG_ENV_SIZE)
+
+#endif /* CONFIG_BOOT_ONENAND */
+
+/* Temporarily, until we have no driver, env is not in nand */
+#undef CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_IS_NOWHERE
+
+/* this is needed to make hello_world.c and other stuff happy */
+#define CONFIG_SYS_MAX_FLASH_SECT 512
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+
+/* base addresses of our peripherals */
+#define NOMADIK_SRC_BASE 0x101E0000 /* System and Reset Cnt */
+#define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */
+#define NOMADIK_MPMC_BASE 0x10110000 /* SDRAM Controller */
+#define NOMADIK_FSMC_BASE 0x10100000 /* FSMC Controller */
+#define NOMADIK_1NAND_BASE 0x30000000
+#define NOMADIK_GPIO0_BASE 0x101E4000
+#define NOMADIK_GPIO1_BASE 0x101E5000
+#define NOMADIK_GPIO2_BASE 0x101E6000
+#define NOMADIK_GPIO3_BASE 0x101E7000
+#define NOMADIK_CPLD_BASE 0x36000000
+#define NOMADIK_UART0_BASE 0x101FD000
+#define NOMADIK_UART1_BASE 0x101FB000
+#define NOMADIK_UART2_BASE 0x101F2000
+
+#define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */
+#define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */
+
+#define NOMADIK_RTC_BASE 0x101E8000
+#define NOMADIK_ETH0_BASE 0x36800300
+#define NOMADIK_CPLD_UART_BASE 0x36480000
+
+#endif /* __CONFIG_H */
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